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Problem Base Learning Of Multi Core Programming

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2010 Annual Conference & Exposition


Louisville, Kentucky

Publication Date

June 20, 2010

Start Date

June 20, 2010

End Date

June 23, 2010



Conference Session

Pedagogy and Assessment in ECE

Tagged Division

Electrical and Computer

Page Count


Page Numbers

15.983.1 - 15.983.12



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Paper Authors

author page

Wei Zhang Southern Illinois University, Carbondale

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NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Problem-Base Learning of Multicore Programming Department of Electrical and Computer Engineering Southern Illinois University Carbondale Carbondale, IL 62901

1. Introduction

The computer industry is rapidly moving towards the multicore processors. Manycore processors have been widely used in all computing domains, including desktop, server and embedded computing systems. A multicore processor combines two or more independent processors into a single package, which is capable of executing multiple threads simultaneously. The L2 cache on a multicore processor can be either private or shared, as depicted in Figure 1 (a) and (b), respectively. Clearly, multicore processors can naturally benefit multithreaded programs by running them on different cores concurrently to improve the throughput. However, unlike other advances of microprocessors aiming at the transparent increase of single-threaded performance (e.g., frequency scaling, pipelines, caches, and superscalar architectures), multicore processors cannot automatically reduce the latency of single-threaded programs. In many cases, there is no way to effectively utilize the performance of additional processor cores or hardware threads without writing explicitly multithreaded programs [1]. In other words, the advent of multicore processors necessitates a fundamental shift of software development paradigm, from the traditional single-threaded programming to multithreaded programming, which is a great challenge.

Thread Thread 2 Thread Thread 2 1 1

CPU CPU CPU CPU and L1 $ and L1 $ and L1 $ and L1 $

L2 L2 Shared L2 Cache

System System L3$/Memory Bus L3$/Memory Bus (a) (b)

Figure 1. A dual-core processor with (a) private L2 caches or (b) shared L2 cache. To prepare students for the coming era of multicore computing, I propose to develop a multicore programming course for our senior and graduate students. The goals of this project are to: • Create a course on multicore programming for general-purpose applications, which can be potentially adapted or adopted by the computer engineering or computer science departments at other institutions. • Investigate the effective use of problem-based learning (PBL) in this course to overcome the difficulty of teaching and learning MTP. More specifically, this project is expected to provide useful insights into several key PBL problems,

Zhang, W. (2010, June), Problem Base Learning Of Multi Core Programming Paper presented at 2010 Annual Conference & Exposition, Louisville, Kentucky. 10.18260/1-2--15945

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