Salt Lake City, Utah
June 20, 2004
June 20, 2004
June 23, 2004
9.10.1 - 9.10.16
CAD BASED DESIGN COURSE USING A STATE OF THE ART SYSTEM LEVEL LANGUAGE
Suryaprasad Jayadevappa (email@example.com) Ravi Shankar ( ravi @cse.fau.edu)
Most major U.S universities offer a design course based on Verilog at the undergraduate level. Verilog is used in the high-tech industry to design and develop their commercial products. The increase in design complexity, shortened time to market and intellectual property based methodologies has created a knowledge gap for both the practicing engineer and the new graduate. Today, there is need for higher levels of abstraction and use of system level description languages.
The technology roadmap from the semiconductor industry and a Dataquest market analysis of the EDA (engineering design automation) industry shows that the primary growth in the EDA industry will come from ESL (electronic system level) tools. Similar to the digital design tools of the 1990s, the current and future ESL tools will drive the job market in the SoC (system-on-a-chip) domain over the next decade. A major contender for a unifying language at this level is SystemC. SystemC is based on the C++ language and has constructs to support hardware modeling. The language supports multiple levels of abstraction, a common environment for design and verification, and hardware-software co-design. Currently the SystemC language is undergoing standardization, but has already been adopted by over one hundred design companies. The infrastructure requirement is quiet low as SystemC is open source. Visual C++ and Open source OSCI simulator provide sufficient support to develop SystemC code.
We have developed a CAD Based Computer Design course using SystemC. Thirty five students enrolled in the course that was offered recently. The major challenges in delivering this course were the ability to express hardware components using a high level language preferred for software development and the adaptability of the students. Important SystemC concepts related to hardware modeling was discussed initially. Many design examples developed helped in explaining the concepts and bring out the difference between sequential and concurrent modeling. All the enrolled students had taken a basic course on C++ earlier. In our experience, previous knowledge of C++ helped regarding the syntax, but at times it turned out to have a negative effect. The negative effect was more due to the sequential nature of software programs. We developed a template which is being extensively used for expressing all our designs during the course. It has helped us in sharing our design ideas better. Reusability of the designed models is another important feature that is being stressed upon in this course.
In this paper, we will present our experiences in developing a software-hardware co- design environment, using SystemC, a new concurrent design language. Exposure to this
Proceedings of the 2004 American Society for Engineering Education Annual Conference & Exposition Copyright © 2004, American Society for Engineering Education
Jayadevappa, S., & Shankar, R. (2004, June), A Cad Based Design Course Using State Of The Art System Level Language Paper presented at 2004 Annual Conference, Salt Lake City, Utah. https://peer.asee.org/13516
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