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A Capstone Analog Integrated Circuits Project For Electronics Engineering Technology Majors

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Conference

2007 Annual Conference & Exposition

Location

Honolulu, Hawaii

Publication Date

June 24, 2007

Start Date

June 24, 2007

End Date

June 27, 2007

ISSN

2153-5965

Conference Session

Electrical Technology Projects and Applications

Tagged Division

Engineering Technology

Page Count

14

Page Numbers

12.9.1 - 12.9.14

Permanent URL

https://peer.asee.org/2067

Download Count

38

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Paper Authors

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David Pocock Oregon Institute of Technology

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DAVID N. POCOCK is an Associate Professor and is the Curriculum Coordinator and head of the Analog Block of the Electronics Engineering Technology department at Oregon Institute of Technology in Klamath Falls, OR. His main research interests are semiconductor device modeling, infrared focal plane arrays, nuclear radiation effects, and web-based real electronics labs for distance education.

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Kevin McCullough Oregon Institute of Technology

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KEVIN MCCULLOUGH is a Senior at Oregon Institute of Technology in the Electronics Engineering Technology program.

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Andrew Carpenter Oregon Institute of Technology

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ANDREW CARPENTER is recent graduate of Oregon Institute of Technology in the Electronics Engineering Technology program.

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Brant Hempel Oregon Institute of Technology

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BRANT HEMPEL is a recent graduate of Oregon Institute of Technology in the Electronics Engineering Technology program.

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

A Capstone Analog Integrated Circuits Project for Electronics Engineering Technology Majors

Abstract

Oregon Institute of Technology offers a Bachelor of Science in Electronics Engineering Technology that includes a senior level capstone course in analog integrated circuit design. This course includes a two credit hour (six contact hours per week) laboratory in which students would normally perform six to eight individual “canned” experiments. Recently the author has re-structured the laboratory to become a term-long group project in the area of analog integrated circuits. This paper describes the results of one of these team projects.

Introduction

The objective of this capstone course is to expose senior EET majors to the design process for analog integrated circuits by working as a member of a design team. Upon completion of this course, a student will have been exposed to the processes of working in a team, picking an idea, researching the topic, formulating a design, dividing up the tasks, generating a schedule, writing periodic progress reports, doing hand calculations and computer simulations, breadboarding individual stages, integrating the entire system, and presenting their results in a formal oral presentation and a final written report; including a fully operational demonstration.1

Requirements

The instructor stipulates that the design must be DC coupled (i.e. no coupling or bypass capacitors), that the breadboard must use matched transistor ICs such as the CA3046 and CA3096, and that the circuit should use current-mirror biasing, active loads, a differential input stage, a gain stage, a level shifter, and an output stage, if applicable. The major building blocks are npn and pnp bipolar junction transistors, but MOSFETs are also allowed.2

Summary

To date, student teams have successfully demonstrated fully operational designs in breadboard for such analog circuits as operational amplifiers, instrumentation amplifiers, voltage comparators, digital-to-analog converters, analog-to-digital converters, sample-and-hold amplifiers, voltage controlled oscillators, phase-locked loops, a frequency synthesizer, and Costas loops. This paper summarizes the results of a team that developed a phase-locked-loop from the transistor level. The students worked harder and learned more compared to the canned lab approach, while the instructor worked less and felt very proud of his students.

Pocock, D., & McCullough, K., & Carpenter, A., & Hempel, B. (2007, June), A Capstone Analog Integrated Circuits Project For Electronics Engineering Technology Majors Paper presented at 2007 Annual Conference & Exposition, Honolulu, Hawaii. https://peer.asee.org/2067

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