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A Digital Signal Processing Laboratory Course Using Field Programmable Gate Array Boards

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Conference

2005 Annual Conference

Location

Portland, Oregon

Publication Date

June 12, 2005

Start Date

June 12, 2005

End Date

June 15, 2005

ISSN

2153-5965

Conference Session

ECE Lab Development and Innovations

Page Count

6

Page Numbers

10.36.1 - 10.36.6

Permanent URL

https://peer.asee.org/15334

Download Count

441

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Paper Authors

author page

James Kang

author page

Alan Felzer

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

A Digital Signal Processing Laboratory Course Using Field Programmable Gate Array Boards

James S. Kang and Alan P. Felzer Department of Electrical and Computer Engineering California State Polytechnic University, Pomona

Abstract

Instead of using digital signal processor (DSP) boards from Texas Instruments or Analog Devices, field programmable gate array (FPGA) boards using Xilinx chips can be used in teaching a laboratory course accompanying a junior level discrete-time signals and systems course, and a laboratory course accompanying a senior-level digital signal processing lecture course. A peripheral board that includes a 16-bit analog to digital converter (ADC), a 16-bit digital to analog converter (DAC), a serial port connector, a universal serial bus connector, and input and output signal connectors in BNC and audio, is designed and built for the DSP laboratory course. The DSP laboratory course using FPGA offers opportunity for the students to implement and integrate what they learned in different courses such as digital signal processing, hardware design, and software design. This course can provide confidence for the students to initiate and complete projects in the future.

The experiments to be performed in the DSP laboratory course using FPGA include sampling and reconstruction of signals, generation of elementary waveforms, implementation of direct digital synthesizers, sound effects, finite impulse response (FIR) filter, infinite impulse response (IIR) filter, adaptive filter, modulators and demodulators, digital phase-locked loop (DPLL), and fast Fourier transform (FFT). Among these experiments, the implementation of the finite impulse response digital filter on the FPGA board along with the peripheral board is described in more detail. The multiply and accumulate (MAC) operation is performed using look-up table without using any multiplier. A sampling rate of 10 kHz is used for the FIR filter.

1. Introduction

In a laboratory course accompanying discrete-time signals and systems course, and a laboratory course accompanying digital signal processing course, typically, digital signal processing boards such as Texas Instruments’ TMS320C6711 (or 6713, 5416) DSP Starter Kits (DSKs) are used. The DSKs provide ADC, DAC, and other peripherals so that many common DSP algorithms can be implemented without external circuits [1]. Since the Code Composer Studio (CCS) is based on C programming language (along with assembly), students can utilize their knowledge of C programming from the relevant courses they already took.

The DSP algorithms can also be implemented using field programmable gate arrays instead of digital signal processors [2]. There are several advantages using FPGAs compared to digital signal processors. The sampling rate for FPGAs is higher than the

1

Kang, J., & Felzer, A. (2005, June), A Digital Signal Processing Laboratory Course Using Field Programmable Gate Array Boards Paper presented at 2005 Annual Conference, Portland, Oregon. https://peer.asee.org/15334

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