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A Jitter Education: Finding A Place For Jitter Analysis In The Eet Curriculum

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2005 Annual Conference


Portland, Oregon

Publication Date

June 12, 2005

Start Date

June 12, 2005

End Date

June 15, 2005



Conference Session

Curriculum Development in Electrical ET

Page Count


Page Numbers

10.43.1 - 10.43.10



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Paper Authors

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Gene Harding

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NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

A Jitter Education: Finding a Place for Jitter Analysis in the EET Curriculum Gene L. Harding Purdue University


Timing jitter has become a major issue in the high-speed electronics industry during the past several years. It is the phenomenon seen when the rising or falling edge of a digital waveform appears before or after the expected time. This paper describes the basics of timing jitter, how to measure and display it, and proposes where and how to incorporate various jitter topics into a four-year electrical engineering technology (EET) curriculum.


Timing jitter is the phenomenon seen when a digital waveform’s transition appears before or after the expected time. If this time displacement is large enough to place the edge into an adjacent clock cycle, the result is a data error on the bus. With the high speeds of today’s bus architectures, jitter that used to be negligible is now very important.

Troubleshooting and correcting jitter problems can be a daunting task. It requires knowledge of the different types of jitter, understanding of their underlying causes, and skillful application of the right test equipment.

This paper is divided into five sections. The first covers the basics of jitter, including the difference between random jitter (RJ) and deterministic jitter (DJ), a brief description of different types of DJ, and typical causes associated with each. The second and third sections discuss the types of jitter measurements and ways to display them, respectively. Several different test instruments can be used to measure and analyze jitter. These are covered briefly in part four, along with some of their strengths and weaknesses. The reader who is already familiar with jitter analysis and the test instruments discussed (real time and sampling scopes, logic analyzers, and bit error ratio testers) may want to skip to part five. This section suggests how to weave jitter topics into a four-year electrical engineering technology (EET) education, as well as which topics might be appropriate for all EET students versus which topics should probably be reserved for digital specialists.

“Proceedings of the 2005 American Society for Engineering Education Annual Conference & Exposition Copyright © 2005, American Society for Engineering Education”

Harding, G. (2005, June), A Jitter Education: Finding A Place For Jitter Analysis In The Eet Curriculum Paper presented at 2005 Annual Conference, Portland, Oregon. 10.18260/1-2--15584

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