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A Spreadsheet Based Simulation Of Cpu Instruction Execution

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2007 Annual Conference & Exposition


Honolulu, Hawaii

Publication Date

June 24, 2007

Start Date

June 24, 2007

End Date

June 27, 2007



Conference Session

Educational Software

Tagged Division

Computers in Education

Page Count


Page Numbers

12.117.1 - 12.117.11



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Paper Authors


Richard Smith U. of St. Thomas - St. Paul

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Dr. Richard E. Smith is an assistant professor at the University of St. Thomas in Minnesota. He has over 30 years of experience in computing systems, almost half of which has focused on information security. Dr. Smith has published two books in addition to numerous articles on information security. Dr. Smith earned a BS in engineering from Boston University, and an MS and PhD in computer science from the University of Minnesota. He is a member of the ACM, the ASEE, and a senior member of the IEEE.

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NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

A spreadsheet-based simulation of CPU instruction execution


The Spreadsheet CPU simulates a central processing unit for teaching purposes. The simulator provides interactive instruction execution like the “Little Man Computer,” the LC-3, and other simulators, but it is not a stand-alone program. Instead, it is implemented atop an off-the-shelf copy of the Microsoft Excel spreadsheet. The spreadsheet cells make it easy for students to observe the simulator's internal operation and to modify its operation if necessary. The Spreadsheet CPU was originally used in introductory computer literacy classes to present the concept of the instruction cycle. Since then it has been used to study instruction set design in an undergraduate computer design class. The Spreadsheet CPU can present CPU design to a broader range of undergraduate students than conventional simulators. Unlike other approaches, the Spreadsheet CPU does not require a background in digital logic or associated design languages in order to modify the CPU's operation or to add or modify instructions. Students can observe all important intermediate results during the cycling of the Spreadsheet CPU, since these results appear in spreadsheet cells. This allows students to study CPU design and perform design experiments without prerequisites in digital design or even in binary arithmetic. The Spreadsheet CPU simulation is distributed with a Creative Commons license and is freely available for use and modification by interested instructors.

Introduction The design and operation of a central processing unit (CPU) is a truly fundamental computing concept. Unfortunately, few students study it in detail outside the confines of digital design, electrical engineering, and computer architecture courses. This is primarily because experiments with CPU design require extensive coursework in binary arithmetic, combinatorial logic, digital state machines, and digital design tools such as register transfer languages. These prerequisites prevent a broader range of students from developing the deeper understanding of computing systems that arises from a study of CPU design. The Spreadsheet CPU makes it possible to introduce elements of basic CPU design and operation to a broader range of students without digital design prerequisites. It was originally developed to present the fundamentals of CPU operation and machine language programming to computing non-majors. Next, it was used to illustrate multi-cycle instruction execution and instruction set design in an undergraduate computer organization course. At present it is being adapted to support a broader range of instruction set design exercises and to illustrate CPU pipelining concepts. As implied by the name, the Spreadsheet CPU is built atop a standard commercial spreadsheet: Microsoft Excel. This makes the CPU simulation and experimentation much more accessible to undergraduates and other introductory level students. By using a standard

Smith, R. (2007, June), A Spreadsheet Based Simulation Of Cpu Instruction Execution Paper presented at 2007 Annual Conference & Exposition, Honolulu, Hawaii. 10.18260/1-2--2130

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