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An Fpga Multiprocessor System For Undergraduate Study

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Conference

2009 Annual Conference & Exposition

Location

Austin, Texas

Publication Date

June 14, 2009

Start Date

June 14, 2009

End Date

June 17, 2009

ISSN

2153-5965

Conference Session

Embedded Computing

Tagged Division

Computers in Education

Page Count

8

Page Numbers

14.195.1 - 14.195.8

Permanent URL

https://peer.asee.org/5856

Download Count

94

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Paper Authors

biography

Christopher Korpela Department of Electrical Engineering and Computer Science

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CHRISTOPHER M. KORPELA is an Assistant Professor in the Department of Electrical Engineering and Computer Science at the United States Military Academy at West Point. He received an M.S. in Electrical Engineering from the University of Colorado in 2006 and is a Senior Member of the Institute of Electrical and Electronic Engineers.

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biography

Robert McTasney Department of Electrical Engineering and Computer Science

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ROBERT J. MCTASNEY is an Assistant Professor in the Department of Electrical Engineering and Computer Science at the US Military Academy at West Point. He received the Ph.D. in Electrical Engineering from the University of Colorado in 2008 and is a member of the Institute of Electrical and Electronic Engineers.

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

An FPGA Multiprocessor System for Undergraduate Study

Abstract

We present our experiences using multiple soft processor cores on an FPGA to study advanced computer architecture at the undergraduate level. Our system instantiates multiple processor cores on a single FPGA device using the Altera Nios® II soft processor and associated CAD tools. With an easy to use development environment and powerful tools to quickly generate designs, an FPGA platform provides the necessary flexibility to quickly produce a working system. Students are able to easily modify and adapt their designs for a specific application. We demonstrate that multiprocessor systems can be developed, implemented and studied by undergraduate students due to the availability and accessibility of design tools and FPGA development boards. Further, these systems enhance the learning of multiprocessors and aptly compliment advanced computer architecture courses covering topics to include shared memory, synchronization, sequential consistency, and memory coherency.

1. Introduction

The last few years have seen a dramatic increase in the capabilities and performance of soft processor cores in Field Programmable Gate Arrays (FPGA). Once limited by relatively low clock speeds, a large number of gates, and cumbersome Computer Aided Design (CAD) tools, these soft processor cores are quickly becoming increasingly powerful for prototyping and high- speed designs. The industry shift toward multiple processors on a single die has brought the need to prototype these designs on reconfigurable systems. At the Intel Developer’s Forum in 2005, the Intel President Paul Otellini stated: “We are dedicating all of our future product development to multicore designs. We believe this is a key inflection point for the industry.” With this paradigm shift in processor technology, it becomes more critical that students are introduced to these types of systems at the undergraduate level.

FPGAs have become commonly available to undergraduate students in digital logic and computer architecture courses. Students are able to code in hardware description languages (Verilog and VHDL) to implement a simple AND gate or utilize industrial quality RISC-based processor cores for high-end designs. The design tools and hardware development boards accessible by undergraduate students have enabled them to produce designs that are comparable to those formerly restricted to the graduate level or in industry.

At the United States Military Academy at West Point, we study and utilize FPGAs in many of our electrical engineering courses. In the Department of Electrical Engineering and Computer Science, EE majors take a number of core courses to include EE360 (Digital Logic) and EE375 (Computer Architecture using VHDL). The program also offers a number of depth threads where the student can focus on a particular area of electrical engineering (i.e. computer architecture). Students learn digital logic in EE360 through the use of MSI (medium-scale integration) logic devices, CPLDs (complex programmable logic devices) and FPGAs. In EE375, students continue to learn computer architecture and VHDL by studying an in-house RISC-based processor core. The final course in the digital thread is EE484 (Advanced Computer

Korpela, C., & McTasney, R. (2009, June), An Fpga Multiprocessor System For Undergraduate Study Paper presented at 2009 Annual Conference & Exposition, Austin, Texas. https://peer.asee.org/5856

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