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An Innovative Rapid Processor Platform Design For Early Engineering Education

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Conference

2005 Annual Conference

Location

Portland, Oregon

Publication Date

June 12, 2005

Start Date

June 12, 2005

End Date

June 15, 2005

ISSN

2153-5965

Conference Session

Curriculum Development in Computer ET

Page Count

6

Page Numbers

10.179.1 - 10.179.6

Permanent URL

https://peer.asee.org/15432

Download Count

17

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Paper Authors

author page

Yong-Kyu Jung

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

An Innovative Rapid Processor Platform Design for Early Engineering Education

Yong-Kyu Jung

Texas A&M University-College Station

Abstract

A new course for the early stage of digital design education is demonstrated. An innovative usage of technologies and an effective organization of numerous subjects to leverage the current classroom practices are presented. In particular, the new course objectives and organization are explained to provide an overall view and details of our rapid design process, as well as to achieve engineering educational goals for reducing a gap between the technologies used in industry and in academia. Expected impacts on realistic, pre-industrial experiences at the early stage of engineering education are also discussed.

Introduction

To teach embedded processor system design, students generally take a series of digital design courses. For instance, courses on Digital Fundamentals and Logic Circuits [1] followed by Computer Architectures [2] are typically taught in the classroom. To accelerate the practical learning process in the classroom, rapid digital system design [3] using field-programmable gate arrays (FPGAs) is often added to the existing curricula. Using FPGA-based prototyping requires learning at least one hardware description language, such as VHDL or Verilog HDL. However, we are continuously challenged not only to reduce the time for teaching the majority of these topics to a single semester, but also to adapt a rapid digital system design process for smoother migration toward the next level of the course. To do so, we have started to develop a customized processor platform for our classroom instruction, instead of using commercial platforms [4], such as FPGA-based platforms along with configurable processor cores [5]. Since reusing existing designs is one of the keys for the rapid design process, we have taught both VHDL and Verilog HDL as primary implementation languages. In this paper, we will discuss the development of this new course including course objectives, organization and evaluation.

Pros and Cons of Current Digital Design Practices in the Classroom

What is the difference between the classroom and industry? This question has been asked many times. In this paper we consider only the differences in the goals, the quality and the scale of work between industry and academia. Because delivering the most marketable products in the shortest amount of time is critical in industrial projects, working engineers are usually more interested in learning application-specific knowledge and skills as quickly as possible. On the other hand, engineering education usually deals with more general

Proceedings of the 2005 American Society for Engineering Education Annual Conference & Exposition Copyright ©2005, American Society for Engineering Education

Jung, Y. (2005, June), An Innovative Rapid Processor Platform Design For Early Engineering Education Paper presented at 2005 Annual Conference, Portland, Oregon. https://peer.asee.org/15432

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