ARM/FPGA/I2C Sensor Network Development and Teaching Platform

Antonio Francisco Mondragon; Prafull Purohit

Download Paper | Permalink

Conference: 2011 ASEE Annual Conference & Exposition
Location: Vancouver, BC
Publication Date: June 26, 2011
Start Date: June 26, 2011
End Date: June 29, 2011
ISSN: 2153-5965
Conference Session: Simulation and Virtual Instrumentation
Tagged Division: Engineering Technology
Page Count: 12
Page Numbers: 22.227.1 - 22.227.12
DOI: 10.18260/1-2--17508
Permanent URL: https://peer.asee.org/17508
Download Count: 942

Request a correction

Paper Authors

biography

Antonio Francisco Mondragon Rochester Institute of Technology

visit author page

Antonio F. Mondragon-Torres received the B.Sc. degree with honors from Universidad Iberoamericana, Mexico City, Mexico, the M.Sc. degree from Universidad Nacional Autónoma de Mexico, Mexico City, Mexico, and the Ph.D. degree (as a Fullbright-CONACYT scholarship recipient) from Texas A&M University, College Station; all degrees in Electrical Engineering in 1990, 1996, and 2002, respectively.
From 1988 to 1995, he worked in a telecommunications company TVSCOM, Mexico City, Mexico, designing teletext products, first as a Design Engineer and later as a Design Manager. In 1995, he joined the Mechanical and Electrical Department, Universidad Iberoamericana as an Associate Professor. From 2002 through 2008, he was with the DSPS R&D Center’s Mobile Wireless Communications Technology branch, Texas Instruments Dallas, TX and in 2008 he moved to the nanoMeter Analog Integration Wireless branch where he worked as Analog IP verification technical lead. In 2009, he worked for Intel Guadalajara, Design Center in Mexico as Front-End/Back-End technical lead. In 2009, he joined the Electrical, Computer and Telecommunications Engineering Technology Department at the Rochester Institute of technology where he currently is a tenured track assistant professor. His research interests are analog and digital integrated circuit implementation of communications systems, and System-on-a-Chip methodologies.

visit author page

biography

Prafull Purohit Rochester Institute of Technology

visit author page

Prafull Purohit received a B.E. degree in electronics engineering at Nagpur University, India in 2007. After completing his B.E., he joined the faculty in the Department of Electronics Engineering at R.K.N. Engineering College, India. He is currently working towards M.S. in Electrical Engineering at Rochester Institute of Technology. His research activities include digital logic design, system-on-a-programmable-chip, and micro-controller based systems.

visit author page

Download Paper | Permalink

Abstract

ARM/FPGA/I2C Sensor Network Development and Teaching PlatformThe computer engineering technology program has a very well-built course sequence in digitaland embedded systems design with a strong emphasis on hands-on experience for the students.The last module in the sequence is being taught as a capstone course that is geared more towardsindustrial like applications and industrial design environment. This includes project managementtechniques, version control and project sign-off milestones.Based on the above guidelines, we are developing a design experience for the students based ona popular commercial computer architecture such as the ARM processor; the flexibility ofextending this architecture by creating hardware accelerator blocks by the integration of a highdensity FPGA; and by the addition of off-the-shelf sensor components that are interconnectedthrough the popular I2C communications bus.During the course, the students will be assigned the following tasks: assemble and test their PCBboards, which are mostly surface mount devices; bring up power generation devices on board;familiarize with the ARM architecture; analyze and develop the optimal hardware and softwarepartitions to allow system’s maintenance and future upgradeability; identification of alreadyavailable intellectual property blocks for reutilization; use of external logic analyzer; extend theARM architecture by designing hardware accelerators; use of internal FPGA debuggingcapabilities; analyze system’s power consumption and use of advanced power optimizationtechniques; explore pipelined architectures and their impact on algorithm’s speedup; attaintiming closure given system’s specifications; work with a tight area/resources budget whilemaintaining system’s performance; create a sensors communication network by using on boardI2C devices and possibly a wireless network by using Zigbee or other similar standard.Out of this capstone experience the students must be comfortable to work in an industry typeenvironment by: working in teams, selecting leadership, work towards achievable milestones,work on a version control environment, work under a bug tracking system, work ondocumentation deliverables, demonstrate intermediate and final project’s prototyping phases.

Citation
Format

Mondragon, A. F., & Purohit, P. (2011, June), ARM/FPGA/I2C Sensor Network Development and Teaching Platform Paper presented at 2011 ASEE Annual Conference & Exposition, Vancouver, BC. 10.18260/1-2--17508

TY  - CPAPER
AB  -     ARM/FPGA/I2C Sensor Network Development and Teaching PlatformThe computer engineering technology program has a very well-built course sequence in digitaland embedded systems design with a strong emphasis on hands-on experience for the students.The last module in the sequence is being taught as a capstone course that is geared more towardsindustrial like applications and industrial design environment. This includes project managementtechniques, version control and project sign-off milestones.Based on the above guidelines, we are developing a design experience for the students based ona popular commercial computer architecture such as the ARM processor; the flexibility ofextending this architecture by creating hardware accelerator blocks by the integration of a highdensity FPGA; and by the addition of off-the-shelf sensor components that are interconnectedthrough the popular I2C communications bus.During the course, the students will be assigned the following tasks: assemble and test their PCBboards, which are mostly surface mount devices; bring up power generation devices on board;familiarize with the ARM architecture; analyze and develop the optimal hardware and softwarepartitions to allow system’s maintenance and future upgradeability; identification of alreadyavailable intellectual property blocks for reutilization; use of external logic analyzer; extend theARM architecture by designing hardware accelerators; use of internal FPGA debuggingcapabilities; analyze system’s power consumption and use of advanced power optimizationtechniques; explore pipelined architectures and their impact on algorithm’s speedup; attaintiming closure given system’s specifications; work with a tight area/resources budget whilemaintaining system’s performance; create a sensors communication network by using on boardI2C devices and possibly a wireless network by using Zigbee or other similar standard.Out of this capstone experience the students must be comfortable to work in an industry typeenvironment by: working in teams, selecting leadership, work towards achievable milestones,work on a version control environment, work under a bug tracking system, work ondocumentation deliverables, demonstrate intermediate and final project’s prototyping phases.
AU  - Antonio Francisco Mondragon
AU  - Prafull Purohit
CY  - Vancouver, BC
DA  - 2011/06/26
PB  - ASEE Conferences
TI  - ARM/FPGA/I2C Sensor Network Development and Teaching Platform
UR  - https://peer.asee.org/17508
DO  - 10.18260/1-2--17508
ER  -