Mondragon, A. F., & Purohit, P. (2011, June), ARM/FPGA/I2C Sensor Network Development and Teaching Platform  Paper presented at 2011 ASEE Annual Conference & Exposition, Vancouver, BC. 10.18260/1-2--17508

\bibitem{asee_peer_17508}
  Mondragon, A. F., \& Purohit, P. (2011, June), \emph{ARM/FPGA/I2C Sensor Network Development and Teaching Platform}
  Paper presented at 2011 ASEE Annual Conference \& Exposition, Vancouver, BC.
  10.18260/1-2--17508

Antonio Francisco Mondragon and Prafull Purohit.  "ARM/FPGA/I2C Sensor Network Development and Teaching Platform".  2011 ASEE Annual Conference & Exposition, Vancouver, BC, 2011, June.  ASEE Conferences, 2011.  https://peer.asee.org/17508 Internet.  04 Dec, 2024

\bibitem{asee_peer_17508}
  Antonio Francisco Mondragon and Prafull Purohit.
  "ARM/FPGA/I2C Sensor Network Development and Teaching Platform".
  \emph{2011 ASEE Annual Conference \& Exposition, Vancouver, BC, 2011, June}.
  ASEE Conferences, 2011.
  https://peer.asee.org/17508 Internet.  04 Dec, 2024

@INPROCEEDINGS{asee_peer_17508
author = "Antonio Francisco Mondragon and Prafull Purohit"
title = "ARM/FPGA/I2C Sensor Network Development and Teaching Platform"
booktitle = "2011 ASEE Annual Conference \& Exposition"
year = "2011"
month = "June"
address = "Vancouver, BC"
publisher = "ASEE Conferences"
note = {https://peer.asee.org/17508}
number = {10.18260/1-2--17508}
}

TY  - CPAPER
AB  -     ARM/FPGA/I2C Sensor Network Development and Teaching PlatformThe computer engineering technology program has a very well-built course sequence in digitaland embedded systems design with a strong emphasis on hands-on experience for the students.The last module in the sequence is being taught as a capstone course that is geared more towardsindustrial like applications and industrial design environment. This includes project managementtechniques, version control and project sign-off milestones.Based on the above guidelines, we are developing a design experience for the students based ona popular commercial computer architecture such as the ARM processor; the flexibility ofextending this architecture by creating hardware accelerator blocks by the integration of a highdensity FPGA; and by the addition of off-the-shelf sensor components that are interconnectedthrough the popular I2C communications bus.During the course, the students will be assigned the following tasks: assemble and test their PCBboards, which are mostly surface mount devices; bring up power generation devices on board;familiarize with the ARM architecture; analyze and develop the optimal hardware and softwarepartitions to allow system’s maintenance and future upgradeability; identification of alreadyavailable intellectual property blocks for reutilization; use of external logic analyzer; extend theARM architecture by designing hardware accelerators; use of internal FPGA debuggingcapabilities; analyze system’s power consumption and use of advanced power optimizationtechniques; explore pipelined architectures and their impact on algorithm’s speedup; attaintiming closure given system’s specifications; work with a tight area/resources budget whilemaintaining system’s performance; create a sensors communication network by using on boardI2C devices and possibly a wireless network by using Zigbee or other similar standard.Out of this capstone experience the students must be comfortable to work in an industry typeenvironment by: working in teams, selecting leadership, work towards achievable milestones,work on a version control environment, work under a bug tracking system, work ondocumentation deliverables, demonstrate intermediate and final project’s prototyping phases.
AU  - Antonio Francisco Mondragon
AU  - Prafull Purohit
CY  - Vancouver, BC
DA  - 2011/06/26
PB  - ASEE Conferences
TI  - ARM/FPGA/I2C Sensor Network Development and Teaching Platform
UR  - https://peer.asee.org/17508
DO  - 10.18260/1-2--17508
ER  -