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Board # 49 : Learner-centered Design of a Web-based Teaching Tool for Circuit Analysis with Embedded Assessment Features

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Conference

2017 ASEE Annual Conference & Exposition

Location

Columbus, Ohio

Publication Date

June 24, 2017

Start Date

June 24, 2017

End Date

June 28, 2017

Conference Session

Electrical and Computer Division Poster Session

Tagged Division

Electrical and Computer

Page Count

13

Permanent URL

https://peer.asee.org/27866

Download Count

31

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Paper Authors

biography

Fred W. DePiero California Polytechnic State University, San Luis Obispo

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Dr. Fred DePiero received his B.S. and M.S. degrees in Electrical Engineering from Michigan State University in 1985 and 1987. He then worked as a Development Associate at Oak Ridge National Laboratory until 1993. While there he was involved in a variety of real-time image processing projects and several laser-based ranging systems. Fred began working on his Ph.D. at the University of Tennessee while still at ORNL, and completed it in May 1996. Fred joined the faculty at CalPoly in September of 1996. He is presently serving as the Associate Dean for Student Success in the College of Engineering.

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biography

Bridget Benson California Polytechnic State University, San Luis Obispo

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Bridget Benson received a Bachelor's degree in Computer Engineering at California Polytechnic State University San Luis Obipso in 2005, a Master's degree in Electrical and Computer Engineering at the University of California Santa Barbara in 2007 and a PhD degree in the Computer Science and Engineering at the University of California San Diego in 2010. She is currently an Assistant Professor in the Electrical Engineering Department at California Polytechnic State University San Luis Obipso. Her research interests span engineering education, embedded systems, and ecological monitoring.

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K. Clay McKell California Polytechnic State University, San Luis Obispo

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Clay McKell earned his B.S. degree, summa cum laude, in mechanical engineering from UCLA in 2006. He earned his M.S. degree in mechanical engineering from UCLA in 2007. He is currently pursuing a Ph.D. in electrical engineering from the University of Hawaii at Manoa and teaching as a lecturer in the Electrical Engineering Department at California Polytechnic State University, San Luis Obispo. His research interests include distributed control of multi-agent networks as well as STEM education practices that foster diversity and equity.

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Abstract

CATE, the Circuit Analysis Tool for Education, is a web-based teaching and learning system for linear circuit analysis. It supports active, assisted and passive learning modes. Students can tackle a particular circuit analysis problem using different learning modes and different techniques. CATE provides a learner-centered environment where the path through examples and problems is driven by a student's navigational choices. This allows students to easily transition between active, assisted and passive learning.

The purpose of assisted learning is to promote the development of abilities that are key building blocks for circuit analysis. These key abilities include the formation of KCL and KVL equations for nodal and mesh analysis. The goal of assisted learning is to lessen the frustration for students who might otherwise only have access to the final answers associated with a circuit analysis problem.

New features of CATE include the assisted learning mode, as well as the ability to transition between different learning modes for the same circuit. Another new feature is a circuit generation algorithm that can produce billions of different AC circuit topologies. CATE can now also generate exam questions with solutions.

Past student satisfaction surveys indicated a generally positive attitude towards CATE and its benefit to learning. To better examine the impact of CATE on student learning we have developed new embedded assessment tools that track students’ activity longitudinally. The resolution of these data can be adjusted from a finer detail with individual clicks to more coarse versions describing runs of activity of similar type. Data sets can be augmented by uploading external assessments such as quiz grades, or by using quiz questions generated internally by CATE. Longitudinal activity and assessment data are recorded temporally in a database to form an integrated picture of student use and ability. We have also developed a feedback mechanism for an instructor that indicates which learning objectives are being investigated by students and at what difficulty level. These data describe activity in a cross-sectional fashion for a student population.

To be clear, CATE provides functionality that is different from SPICE. Each does provide values for voltages and currents in a circuit. However SPICE does not present intermediate equations associated with various types of analyses. Furthermore CATE helps address some common misconceptions such as the identification of series and parallel elements. It also provides an environment that allows students to readily build on their prior abilities by scaffolding.

CATE is a free web resource that works in a variety of browsers and is presented without any ads. Visit YourLearningCoach.com.

DePiero, F. W., & Benson, B., & McKell, K. C. (2017, June), Board # 49 : Learner-centered Design of a Web-based Teaching Tool for Circuit Analysis with Embedded Assessment Features Paper presented at 2017 ASEE Annual Conference & Exposition, Columbus, Ohio. https://peer.asee.org/27866

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