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Closing the Design Loop in Freshman Engineering

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Conference

2011 ASEE Annual Conference & Exposition

Location

Vancouver, BC

Publication Date

June 26, 2011

Start Date

June 26, 2011

End Date

June 29, 2011

ISSN

2153-5965

Conference Session

Design Tools & Methodology II

Tagged Division

Design in Engineering Education

Page Count

9

Page Numbers

22.331.1 - 22.331.9

Permanent URL

https://peer.asee.org/17612

Download Count

24

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Paper Authors

biography

Thomas E. Doyle McMaster University

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Dr. Doyle is an Assistant Professor at McMaster University. His teaching interests include McMaster’s freshman program including the cornerstone design course. Dr. Doyle is a leading member of the faculty team, enriching and transforming McMaster’s curriculum to meet emerging challenges of the profession. His research interests include biomedical signal processing, human-computer interfacing (HCI), brain computer interfacing (BCI), machine learning, and simulation for education. Dr. Doyle earned his PhD at the University of Western Ontario. He is a Professional Engineer in the province of Ontario and a member of the ASEE and IEEE, among other societies.

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biography

Spencer Smith McMaster University

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Spencer obtained his undergraduate and graduate (M.Eng., Ph.D.) degrees in Civil Engineering from McMaster University. In 2000 he started a position as an Assistant Professor in the newly formed Department of Computing and Software at McMaster. Currently, Spencer is an Associate Professor in Computing and software. Spencer has taught courses on such topics as the following: introduction to computing as a discipline, software design, scientific computing and communication skills. Spencer's research interests focus on improving the quality of scientific computing software via the application of software engineering methodologies. In terms of professional development, Spencer obtained is Professional Engineering license (P.Eng.) in 2006

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biography

Adrian Ieta State University of New York, Oswego

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Adrian Ieta (M. 1999) received the B.Sc. degree in physics from the University of Timisoara, Timisoara, Romania, in 1984, the B.E.Sc. degree in electrical engineering from the “Politehnica” University of Timisoara, Timisoara, in 1992, and the M.E.Sc. degree and the Ph.D. degree in electrical and computer engineering from The University of the Western Ontario, London, ON, Canada, in 1999 and 2004, respectively. He was with the Applied Electrostatics Research Centre and the Digital Electronics Research Group, The University of Western Ontario, where he worked on industrial projects and taught. He is currently an Assistant Professor in the Department of Physics, State University of New York, Oswego. Dr. Ieta is a member of Professional Engineers of Ontario.

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Abstract

Closing the Design Loop in Freshman EngineeringTeaching engineering design and graphics to a freshman class presents the challengeof balancing prescribed lessons vs. open ended questions. Given that few studentshave experience with the design process, and fewer still have formalized designs usingCAD software, the teaching process is often one of demonstration. Given timeconstraints there is rarely time to visit the topics of verification or the practice of designiteration. We present a model for teaching freshmen design that incorporatesdocumenting the idea, formalizing the design, and model simulation for verification andimprovement. Most courses of this type, especially at the freshmen level, focusprimarily on the first two elements. Using a common symbolic modelling andvisualization software package, students import their CAD model designs for testing andimmediate verification. This closing of the design loop makes the material moreengaging for students of all disciplines and allows the instructor to go much further inthe design discussion. Student work and feedback will be presented along withsuggestions of how this process could apply to other engineering courses.

Doyle, T. E., & Smith, S., & Ieta, A. (2011, June), Closing the Design Loop in Freshman Engineering Paper presented at 2011 ASEE Annual Conference & Exposition, Vancouver, BC. https://peer.asee.org/17612

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