June 26, 2011
June 26, 2011
June 29, 2011
Electrical and Computer
22.503.1 - 22.503.9
Digital Design meets DSPOne common class taken early in most undergraduate electrical engineering curricula is digitaldesign. This course typically teaches students to design relatively simple digital circuits usingthe concepts of combinational and sequential design including the use of registers. However,more complicated issues such as the use of SPI and I2C interfaces is typically beyond theirexperience until later in the curricula.Signals and Systems is typically taken after digital design but frequently before or concurrentwith a course teaching the more complicated interfaces like SPI and I2C. Thus, students inSignals frequently have had digital design but have not yet fully understand more complicatedinterfaces. This complicates student experiments that seek to teach DSP algorithms withoutknowledge of SPI and/or I2C interfaces to typical A/D and D/A chips. A typical configurationusing SPI devices is shown in Figure 1. Although this looks simple, significant complexity ishidden by the use of the serial A/D and D/A chips. While this approach typically yields superiorperformance, and a simpler HW interface, the complexity of having to program (in either SW ora FPGA) the interfaces often obscures to real lessons of DSP. One option is to provide a‘canned’ solution for the interfaces. But some instructors feel that this obscures the students’solution of the DSP problem.In this paper, an alternate experiment is presented in which 8-bit parallel A/D and D/A chips areused. Most students who have completed digital design understand registers and the relativelysimple sequential logic needed to trigger conversion in the A/D chip. And the D/A chip can bedirectly driven from a simple register. The resulting configuration is shown in Figure 2. Thisdesign allows any student who has completed digital design to fully implement complex DSPalgorithms as well as see the effects of finite bit sizes. The sample demonstrated in this paperutilizes the Xilinx FPGA as well as Mathworks’ Matlab with Simulink and the Xilinx SystemGenerator to demonstrate Model Based Design of a DSP filtering algorithm. This allowsstudents to progress from floating point analysis through fixed point simulation and finallyprogramming the Xilinx FPGA to allow the student to perform hardware testing. In addition tothe demonstration DSP algorithms in a hardware setting, it also provides students withexperience with the Model Based Design philosophy as a tool to see how a design progressesfrom theoretical analysis through to hardware implementation.
Greene, C. S., & Nyombi, P. I. (2011, June), Digital Design Meets DSP Paper presented at 2011 ASEE Annual Conference & Exposition, Vancouver, BC. 10.18260/1-2--17784
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