Asee peer logo

Digital Laboratory Enhancement

Download Paper |

Conference

1999 Annual Conference

Location

Charlotte, North Carolina

Publication Date

June 20, 1999

Start Date

June 20, 1999

End Date

June 23, 1999

ISSN

2153-5965

Page Count

6

Page Numbers

4.197.1 - 4.197.6

DOI

10.18260/1-2--7588

Permanent URL

https://peer.asee.org/7588

Download Count

306

Request a correction

Paper Authors

author page

George Tjilos

author page

Lisa Anneberg

author page

Ece Yaprak

Download Paper |

Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Session 2647 DIGITAL LABORATORY ENHANCEMENT Ece Yaprak George Tjilos Lisa Anneberg Engineering Technology Wayne State University Detroit, MI 48202

Abstract

This paper describes the implementation of a digital laboratory enhancement using Altera’s state-of-the-art laboratory equipment at Wayne State University (WSU). The unique collaboration among the WSU, the Altera Corporation and the National Science Foundation in improving the undergraduate education in the United States is explained.

I. Introduction

The profound advances we have experienced in computer technology during the last decade have propelled the need to educate every undergraduate student with the latest enhancements in technology to the forefront of educational objectives. To address this need, the digital laboratory facilities of the Engineering Technology (ET) program at WSU has received funding from the National Science Foundation (NSF) and the Altera Corporation. The objective of this enhancement project is to enrich the quality of undergraduate digital laboratory instruction by providing an environment to conduct learning about, and use of, Programmable Logic Devices (PLD), a key advance in digital electronics [1,2].

Most modern digital designs require the use of computer-aided design methods and tools. Many PLD packages today come with a simulation option where the simulation package tests the logical operation and internal timing. This allows each student to model his/her circuit design before programming it into a chip. Altera Corporation’s Max+Plus II design package is used in our digital design and computer architecture classes [3]. It offers a variety of logic design capabilities which foster greater student learning. Students can combine text, graphic, and waveform design entry methods while creating their own designs. Altera’s development package drastically reduces the wiring difficulties in the realization phase and enhances our students’ learning about design with state-of-the-art equipment.

In this paper, the implementation of a digital laboratory enhancement and its impact on ET education at WSU is presented.

Tjilos, G., & Anneberg, L., & Yaprak, E. (1999, June), Digital Laboratory Enhancement Paper presented at 1999 Annual Conference, Charlotte, North Carolina. 10.18260/1-2--7588

ASEE holds the copyright on this document. It may be read by the public free of charge. Authors may archive their work on personal websites or in institutional repositories with the following citation: © 1999 American Society for Engineering Education. Other scholars may excerpt or quote from these materials with the same citation. When excerpting or quoting from Conference Proceedings, authors should, in addition to noting the ASEE copyright, list all the original authors and their institutions and name the host city of the conference. - Last updated April 1, 2015