Honolulu, Hawaii
June 24, 2007
June 24, 2007
June 27, 2007
2153-5965
Computers in Education
13
12.574.1 - 12.574.13
10.18260/1-2--2194
https://peer.asee.org/2194
483
Dr. Jonathan Hill is an assistant professor in the College of Engineering, Technology, and Architecture (CETA) at the University of Hartford, Connecticut (USA). Ph.D. and M.S. from Worcester Polytechnic Institute (WPI) and B.S. from Northeastern University. Previously an applications engineer with the Networks and Communications division of Digital Corporation. His interests involve embedded microprocessor based systems.
Dr. Hisham Alnajjar is the chair for the Electrical and Computer Engineering Dept. at the University of Hartford, Connecticut (USA), where he is also the assistant dean of the College of Engineering, Technology, and Architecture (CETA). Ph.D. from Vandebilt University, M.S. from Ohio University. His research interests include sensor array processing, digital signal processing, and power systems.
Dr. Saeid Moslehpour is an assistant professor in the electrical and computer engineering department in the College of Engineering, Technology, and Architecture (CETA) at the University of Hartford. PhD from Iowa State University and B.S. M.S. and Ed.Sp. degrees from Central Missouri State University. His areas of interest are logic design, CPLDs, FPGAs and distance learning.
Educational Discrete Time Signal Processing Toolkit
Abstract
The field programmable gate array (FPGA) provides new ways for students to investigate discrete time signal processing principles. In teaching signal processing, we find that students typically lack an intuitive feel for discrete time signals. Basic topics such as sampling have subtleties that plague students. To be useful in helping students to develop such an intuition, it is important that the tools be simple and that no detail be hidden. Unlike existing software, all details must be visible in a simple yet transparent fashion. Second, students need useful tools for developing their own projects.
We are developing the discrete time signal processing toolkit for a digital signal processing (DSP) course, to be useful to students learning DSP principles as well as to advanced students working on their own projects. As an introductory tool, the toolkit will allow a deductive approach where students investigate existing systems. Advanced students ready for a more inductive approach can use the toolkit in their own projects by drawing schematics or modifying example VHDL modules. Students are not expected to write code using a hardware description language, but the underlying code is always available for inspection.
The toolkit is multipurpose that along with course materials provides several methods to process signals. First off, the toolkit demonstrates signal conversion, sampling, aliasing, and the importance of a reconstruction filter. Fixed point numbers are discussed and a simple IIR filter is presented. A simple structure used to perform convolution is used as a building block to construct FIR filters. The toolkit can optionally use a soft core digital signal processor. Details of the toolkit are available on the project website1.
Introduction
The discrete time signal processing toolkit is useful to students learning digital signal processing principles as well as advanced students working on their own projects. In teaching signal processing, we find that students typically lack an intuitive feel for discrete time signals. Basic topics such as sampling have subtleties that plague students. The discrete time signal processing toolkit is being developed for a digital signal processing course, to be useful in helping students to develop such an intuition, it is important that the tools be simple and that all details be visible in a simple yet transparent fashion.
Details of the toolkit are available on the project website1. The toolkit is currently based on the Xilinx4 Spartan-3 FPGA Starter Board, which is an off-the shelf development board from Digilent, Inc2. The development board is used with a custom acquisition card that we designed. Analog to digital conversion is performed with the Analog Devices3 AD7819 chip which produces 8 bit samples at rates up to 200k samples per second. Digital to analog conversion is performed using a conventional R-2R ladder network. The acquisition card has a solderless bread board area for students to construct analog input and output filters.
Hill, J., & Alnajjar, H., & Moslehpour, S. (2007, June), Educational Discrete Time Signal Processing Toolkit Paper presented at 2007 Annual Conference & Exposition, Honolulu, Hawaii. 10.18260/1-2--2194
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