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Educational Goals For Embedded Systems In The Multicore Era

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Conference

2009 Annual Conference & Exposition

Location

Austin, Texas

Publication Date

June 14, 2009

Start Date

June 14, 2009

End Date

June 17, 2009

ISSN

2153-5965

Conference Session

Embedded System Design

Tagged Division

Electrical and Computer

Page Count

9

Page Numbers

14.513.1 - 14.513.9

Permanent URL

https://peer.asee.org/4739

Download Count

45

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Paper Authors

biography

James Holt Freescale Semiconductor, Inc.

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Jim leads the Multicore Design Evaluation team for Freescals NMG/NSD division. Jim has 27 years of industry experience focused on distributed systems, microprocessor and SoC architecture, design verification, and optimization. Jim is an IEEE Senior Member, and is a board member for the Multicore Association. He is also chair of the Integrated Systems & Circuits Science area for the Semiconductor Research Corporation (SRC), and chair of the Multicore Resource API Working group for the Multicore Association. Jim earned a Ph.D. in Electrical and Computer Engineering from the University of Texas at Austin, and an MS in Computer Science from Texas State University.

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biography

Hongchi Shi Texas State University, San Marcos

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Hongchi Shi is Professor and Chair of the Computer Science Department at Texas State University-San Marcos. Prior to joining Texas State University, he has been an Assistant/Associate/Full Professor of Computer Science and Electrical and Computer Engineering at the University of Missouri. He obtained his BS degree and MS degree in Computer Science and Engineering from Beijing University of Aeronautics and Astronautics in 1983 and 1986,
respectively. He obtained his PhD degree in Computer and Information Sciences from the University of Florida in 1994. Hongchi Shi's research interests include parallel and distributed computing, wireless sensor networks,
neural networks, and image processing. He has served on many organizing and/or technical program committees of international conferences in his research areas. He is a member of ACM and a senior member of IEEE.

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Harold Stern Texas State University, San Marcos

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Harold Stern (BSEE University of Texas, Austin, MSEE and Ph.D., University of Texas, Arlington) is Director of the Ingram School of Engineering at Texas State University – San Marcos. His research interests are signal processing, wireless communication systems, and engineering education. He is co-author of an introductory-level textbook, Communication Systems Analysis and Design.

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Educational Goals for Embedded Systems in the Multicore Era

Abstract

Embedded systems are becoming increasingly sophisticated. For example, today's automobiles have requirements for adaptive engine control to meet emissions and fuel-economy standards, advanced diagnostics for repair, reduction of wiring, new safety features, and new comfort and convenience features. The software required to support this feature set is quite complex and has strict performance requirements, and the hardware must operate well in extreme climate conditions with limited power resources. Yet, in order to keep materials costs low automobile manufacturers must deploy these capabilities using as few microprocessors as possible. For these reasons, the microprocessors used in automotive applications must be both high- performance and energy-efficient. These demands are at cross purposes with traditional high- performance microprocessor design, and the industry has responded with innovative embedded multicore architectures. Instead of throttling up the performance of a single processor core (which is very power intensive), a new breed of microprocessors incorporates multiple low power processor cores onto a single chip. This approach results in a higher throughput system capable of running many concurrent threads of computation in an energy-efficient fashion. These changes in the microprocessor landscape have satisfied the need for high-performance, energy-efficient processors. However, they have left engineers who are experienced only with single-core embedded systems and sequential programming languages at a disadvantage, lacking exposure to critical concepts required to design, program, debug, and optimize this new breed of embedded systems. The problem will surely be exacerbated in the not-too-distant future when (as many experts predict) the multicore era transitions to the manycore era. For these reasons, it is time to consider some new educational goals which will prepare future engineers for the multicore era and beyond. This paper discusses the essential concepts that should be included in an undergraduate computer engineering curriculum that takes embedded multicore systems into account.

Introduction

Many people believe that the incorporation of multiple cores on a single chip began in the high- end workstation and desktop market to mitigate the ever-increasing power demands of traditional performance enhancement techniques such as clock frequency scaling, increased pipeline lengths, and super-scalar instruction issue1. But the truth is that many embedded applications were employing multiple cores on a chip long before these high profile chip multiprocessors caught the attention of the public. For example, cell phone chips of the late 1990s commonly incorporated a general purpose applications processor core alongside a digital signal processor core.

A brief examination of the product portfolios of major semiconductor companies will show that multicore chips are becoming part of the mainstream offerings in many embedded application domains including consumer, industrial, networking, medical, military, gaming, and automotive. This change is happening very rapidly, and has caused consternation within the embedded programming community. Many in the industry believe that the concerns stem from two main

Holt, J., & Shi, H., & Stern, H. (2009, June), Educational Goals For Embedded Systems In The Multicore Era Paper presented at 2009 Annual Conference & Exposition, Austin, Texas. https://peer.asee.org/4739

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