April 20, 2017
April 20, 2017
April 22, 2017
Pacific Southwest Section
Research experience is enriching and inspiring for undergraduate students. Research experiences on advanced technologies are far from reach in undergraduate level studies. In this paper, we present an approach to address this gap via summer research opportunities for undergraduate students. The internship is planned over 10 weeks, and the student interns are assigned a graduate student mentor and a faculty advisor. This paper presents the details of the project, research and educational objectives, results obtained, and the student surveys assessing the outcomes. The planned research project is related to the Spin Transfer Torque (STT) Magnetic RAM (STTMRAM), which is a promising technology for information storage. In this technology, the information is stored in a magnetic form that is non-volatile and also much more scalable as compared to the existing charge based storage technologies such as SRAM, DRAM, and flash. The main target application of STTMRAM is for storage and the main targeted market is replacement of DRAM main memory and SRAM cache. In this research, we propose a unique application for STTMRAM and that is to realize reconfigurable logic using Look-Up Table (LUT) based logic implementation in which the LUTs are implemented using STTMRAM technology. The results of student surveys on the experience of student participants with the research internship strongly suggest that such an experience is very valuable in helping the students decide if they want to purse STEM research careers. Moreover, this experience enhances students’ technical research skills such as scientific thinking, ability to analyze and interpret results, and presentation skills.
Leung, B. J., & Huang, Y., & lorenzo, F., & Rodriguez-Reyes, S., & Young, J. C. L., & attaran, A., & Enriquez, A. G., & Chen, C., & Jiang, Z., & Pong, W., & Shahnasser, H., & Teh, K. S., & Zhang, X., & Mahmoodi, H. (2017, April), Engaging Undergraduate Students in Research: Efficient Logic Design in Nano-Scale using Spin Transfer Torque Memory Technology Paper presented at 2017 Pacific Southwest Section Meeting, Tempe, Arizona. https://peer.asee.org/29216
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