June 24, 2007
June 24, 2007
June 27, 2007
12.911.1 - 12.911.13
Integrating Asynchronous Digital Design and Testing into the Undergraduate Computer Engineering Curriculum
As demand rises for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used in the semiconductor industry, as evidenced by the International Technology Roadmap for Semiconductors’ (ITRS) prediction of a likely shift from synchronous to asynchronous design styles in order to increase circuit robustness, decrease power, and alleviate many clock-related issues 1. ITRS predicts that asynchronous circuits will account for 19% of chip area within the next 5 years, and 30% of chip area within the next 10 years 2. To meet this growing industry need, students in Computer Engineering should be introduced to asynchronous circuit design to make them more marketable and more prepared for the challenges faced by the digital design community for years to come.
The development of synchronous circuits currently dominates the semiconductor design industry. However, there are major limiting factors to the synchronous, clocked approach, including the increasing difficulty of clock distribution, increasing clock rates, decreasing feature size, increasing power consumption, timing closure effort, and difficulty with design reuse. Asynchronous circuits require less power, generate less noise, produce less electro-magnetic interference (EMI), and allow for easier reuse of components, compared to their synchronous counterparts, without compromising performance.
In most Computer Engineering curricula students are only taught the synchronous, clocked paradigm, and never even touch on asynchronous digital design. Those curricula that do mention asynchronous design do so only in passing; the students are not taught how to design asynchronous circuits. The widespread introduction of asynchronous digital design in the classroom is largely constrained by the lack of introductory educational materials. This paper presents one approach for integrating asynchronous circuit design into the undergraduate Computer Engineering curriculum, focusing on inclusion in two courses, one on Hardware Design Languages (HDLs), such as VHDL, and the other on VLSI.
The paper is organized into 5 sections. Section 2 presents an overview of asynchronous logic; Section 3 describes the asynchronous materials developed for use in undergraduate Computer Engineering courses; Section 4 depicts the original VHDL and VLSI course outlines and shows how these courses have been augmented to include the asynchronous materials; and Section 5 presents the outcomes of the first offerings of the VHDL and VLSI courses with the asynchronous materials included, and provides conclusions and directions for future work.
The authors gratefully acknowledge the support from the National Science Foundation under CCLI grant DUE-0536343.
Smith, S., & Al-Assadi, W. (2007, June), Integrating Asynchronous Digital Design And Testing Into The Undergraduate Computer Engineering Curriculum Paper presented at 2007 Annual Conference & Exposition, Honolulu, Hawaii. https://peer.asee.org/2762
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