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Interdisciplinary Research On Modeling And Scheduling Of Semiconductor Manufacturing Operations

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2000 Annual Conference


St. Louis, Missouri

Publication Date

June 18, 2000

Start Date

June 18, 2000

End Date

June 21, 2000



Page Count


Page Numbers

5.391.1 - 5.391.10



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Paper Authors

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Jennie Si

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Frank C. Hoppensteadt

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Forouzan Golshani

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Donald W. Collins

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Christian Ringhofer

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Kostas Tsakalis

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NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Session 3647

Interdisciplinary Research on Modeling and Scheduling of Semiconductor Manufacturing Operations

Donald Collins, Ph.D., Manufacturing Engineering Technology, Forouzan Golshani, Ph.D., Computer Science, Frank Hoppensteadt, Ph.D., Math and Electrical Engineering, Christian Ringhofer, Ph.D., Math, Jennie SI, Ph.D., Electrical Engineering, Kostas Tsakalis, Ph.D., Electrical Engineering Arizona State University


This paper will describe the ongoing interdisciplinary research work of a group of faculty and students working within the Systems Science and Engineering Research Center at Arizona State University (SSERC) in collaboration with INTEL and Motorola.

One of the strongest driving forces in the economy of most developed countries is manufacturing. In the United States, one of the most important components of this driving force is the manufacturing of semiconductors in fabrication facilities (FAB). Not surprisingly, tremendous efforts have been expended to reduce the art of semiconductor manufacturing to a science.

While the improvements in scale and yield of semiconductor manufacturing has been spectacular and are well known, the improvement in operational methods of process flow and process scheduling have not been as impressive. The most obvious reason for this is the inherent physical/chemical complexity of these processes. Semiconductor manufacturing processes are hundreds of steps long, and factories typically operate multiple processes with each one running many product devices to serve a dynamic marketplace. Process flows are re-entrant and the work in process can be subject to rework. Finite equipment and human resources exhibit a wide range of variability of availability and performance. There are batching or set-up considerations on machines that process by wafer, by lot, or by batch.

One practical consequence of all of this complexity is that decisions must be made on very different time-scales. The smallest time-scale being every few minutes during floor operations, usually about resource allocation - which step/lot combination to run next, which down machine to repair next, and so on. The medium time-scale of every few days or weeks, responding to market changes. To the largest time-scale of every few months concerning process changes, design improvements, etc. The integration of all of these operational decisions defines the performance of the factory. The key difficulty in making these decisions lies in the intricacy by which they affect the long- and short-term factory performance, as well as each other.

Si, J., & Hoppensteadt, F. C., & Golshani, F., & Collins, D. W., & Ringhofer, C., & Tsakalis, K. (2000, June), Interdisciplinary Research On Modeling And Scheduling Of Semiconductor Manufacturing Operations Paper presented at 2000 Annual Conference, St. Louis, Missouri. 10.18260/1-2--8491

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