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Interpolation: A First Step In Teaching Rate Conversion

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Conference

2006 Annual Conference & Exposition

Location

Chicago, Illinois

Publication Date

June 18, 2006

Start Date

June 18, 2006

End Date

June 21, 2006

ISSN

2153-5965

Conference Session

Issues in Digital Signal Processing

Tagged Division

Computers in Education

Page Count

10

Page Numbers

11.825.1 - 11.825.10

Permanent URL

https://peer.asee.org/786

Download Count

66

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Paper Authors

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Cameron Wright University of Wyoming Orcid 16x16 orcid.org/0000-0002-6029-1896

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Cameron H. G. Wright, Ph.D, P.E., is with the Department of Electrical and Computer Engineering at the University of Wyoming, Laramie, WY. His research interests include signal and image processing, real-time embedded computer systems, biomedical instrumentation, and wireless/satellite communications systems. He is a member of ASEE, IEEE, SPIE, NSPE, Tau Beta Pi, and Eta Kappa Nu. E-mail: c.h.g.wright@ieee.org

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Michael Morrow University of Wisconsin-Madison

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Michael G. Morrow, MEngEE, P.E., is a Faculty Associate in the Department of Electrical and Computer Engineering at the University of Wisconsin, Madison, WI. His research interests include real-time digital systems, embedded system
design, software engineering, curriculum design, and educational assessment techniques. He is a member of ASEE and IEEE. E-mail: morrow@ieee.org

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Thad Welch U.S. Naval Academy

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Thad B. Welch, Ph.D, P.E., is with the Department of Electrical and Computer Engineering at the U.S. Naval Academy, Annapolis, MD. He was a visiting
scholar at the University of Wyoming in Fall 2004. His research interests include the implementation of communication systems using DSP techniques, DSP
education, multicarrier communication systems analysis, and RF signal propagation. Commander Welch is a member of ASEE, IEEE, Tau Beta Pi, and Eta Kappa Nu. E-mail: t.b.welch@ieee.org

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Interpolation: A First Step in Teaching Rate Conversion

Abstract

The convergence of digital communications and digital signal processing is gaining emphasis in many engineering colleges today. The implementation of these communication systems using both high performance digital signal processors (DSPs) and field programmable gate arrays (FPGAs) is nothing new. In general, these concepts and techniques can be discussed under the umbrella term of software defined radio (SDR). To understand a SDR, one needs to understand rate conversion. While the basics of the rate conversion theory have been well established for decades, the inclusion of these topics at the undergraduate level can be fraught with teaching dangers. If realistic hardware projects and hardware-based demonstrations are to be included as part of a course, the cost factors escalate rapidly. With most commercially available boards costing more than $10,000 apiece, multiple boards to support such a course rapidly become prohibitively expensive.

To support our desire to teach these topics at the undergraduate level, we felt it was necessary to develop a low cost DSP board that would allow us to implement the realistic hardware projects and hardware-based demonstrations previously mentioned. This new board interconnects a Texas Instrument (TI) C6711 or C6713 DSP starter kit (DSK) to an Analog Devices (AD) quadrature modulator (AD9857). This modulator is capable of operating at up to 200 million samples per second (MS/s), with a resulting carrier or intermediate frequency of up to 80 MHz (i.e., 40% of the system’s sample frequency). An onboard 32-bit direct digital synthesizer (DDS) is used to generate the carrier waveform values. Baseband 14-bit in-phase and quadrature (I/Q) data are presented to the modulator, which can be programmed to interpolate the data at rates of 4x to 252x. The AD9857 is interfaced to the DSK using an Altera Cyclone FPGA. The FPGA provides queuing of the I/Q data, and the logic for control/programming of the modulator.

This paper will detail the hardware and software issues associated with this system and briefly describe the classroom utilization of this system in an undergraduate environment.

1 Introduction

The convergence of digital communications and digital signal processing is gaining emphasis in many engineering colleges today. The implementation of these communication systems using both high performance digital signal processors (DSPs) and field programmable gate arrays (FPGAs) is nothing new. In general, these concepts and techniques can be discussed under the umbrella term of software defined radio (SDR). To understand a SDR, one needs to understand rate conversion. While the basics of the rate conversion theory have been well established for

Wright, C., & Morrow, M., & Welch, T. (2006, June), Interpolation: A First Step In Teaching Rate Conversion Paper presented at 2006 Annual Conference & Exposition, Chicago, Illinois. https://peer.asee.org/786

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