Hassan, A., & Dallal, A., & Zaghloul, M. A. S., & Dickerson, S. J. (2023, June), Introducing High-Level Synthesis in Computer Engineering Curricula  Paper presented at 2023 ASEE Annual Conference & Exposition, Baltimore , Maryland. 10.18260/1-2--43845

\bibitem{asee_peer_43845}
  Hassan, A., \& Dallal, A., \& Zaghloul, M. A. S., \& Dickerson, S. J. (2023, June), \emph{Introducing High-Level Synthesis in Computer Engineering Curricula}
  Paper presented at 2023 ASEE Annual Conference \& Exposition, Baltimore , Maryland.
  10.18260/1-2--43845

Amr Hassan, Ahmed Dallal, Mohamed A. S. Zaghloul, and Samuel J Dickerson.  "Introducing High-Level Synthesis in Computer Engineering Curricula".  2023 ASEE Annual Conference & Exposition, Baltimore , Maryland, 2023, June.  ASEE Conferences, 2023.  https://peer.asee.org/43845 Internet.  15 May, 2024

\bibitem{asee_peer_43845}
  Amr Hassan, Ahmed Dallal, Mohamed A. S. Zaghloul, and Samuel J Dickerson.
  "Introducing High-Level Synthesis in Computer Engineering Curricula".
  \emph{2023 ASEE Annual Conference \& Exposition, Baltimore , Maryland, 2023, June}.
  ASEE Conferences, 2023.
  https://peer.asee.org/43845 Internet.  15 May, 2024

@INPROCEEDINGS{asee_peer_43845
author = "Amr Hassan, Ahmed Dallal, Mohamed A. S. Zaghloul, and Samuel J Dickerson"
title = "Introducing High-Level Synthesis in Computer Engineering Curricula"
booktitle = "2023 ASEE Annual Conference \& Exposition"
year = "2023"
month = "June"
address = "Baltimore , Maryland"
publisher = "ASEE Conferences"
note = {https://peer.asee.org/43845}
number = {10.18260/1-2--43845}
}

TY  - CPAPER
AB  - Courses on digital design are essential components of all computer engineering curricula.  Most programs have an introductory digital design course, where students learn the basics of logic gates, hardware description languages, and FPGA design.  This introduction is typically followed up by an advanced course where students delve deep into digital design flows, register transfer level (RTL) design, and FPGA synthesis.   While these advanced topics are still essential for computer engineering students to learn, the professional practice has taken leaps forward in their use of FPGAs by adopting newer technologies. Specifically, the incorporation of FPGAs that support high-level synthesis, the automatic creation of register-transfer level descriptions from abstract, high-level programming languages (such as C++), is now the most prolific use-case for FPGAs in cutting-edge, real-world applications.  Furthermore, modern FPGAs have more than just programmable logic, they also contain integrated CPUs that can be leveraged for additional functionality.

Computer engineering programs have been slow to adopt these technological changes and as a result, examples of the use of high-level synthesis in the undergraduate classroom are few and far between.  Thus, several important research questions need to be addressed, such as 1) How and when should high-level synthesis (HLS) be introduced in computer engineering curricula, 2) What preparation do students need to understand HLS, 3) In what context/application area should HLS be introduced, and 4) What is the impact on students and their future prospects?  

In this work, we address these research questions via the revamping of an Advanced Digital Design course, offered by the Electrical and Computer Engineering Department at the school hosting this study. The instructors incorporated the use of state-of-the-art FPGA kits and deployed hands-on, HLS modules.  Additionally, students were taught how to leverage the integrated CPUs to automate testing throughout the course. 

Evaluation and assessment of this work will be done in two different aspects, quantitative and qualitative. To evaluate the effectiveness of the HLS and testing modules, student projects are directly assessed via a rubric by the instructor. For the qualitative assessment, students were surveyed over the last four offerings of this course to capture their perspectives and opinions on the impact of the new components on their learning. The results of the surveys will be summarized and presented in this paper, along with some students’ testimonials explaining how getting hands on experience with HLS and the integrated CPU helped them land industry jobs. Additionally, the very first two offerings of the revamped course were during Fall 2020 and Spring 2021, during the COVID-19 pandemic, and were delivered remotely. The authors will also discuss the challenges and feasibility they faced in offering a lab-based course fully online and students’ perspectives on it. Finally, the authors will provide a set of best practices and summarize their experience for faculty who wants to adopt this work.  The results show that in addition to gaining exposure to commercial-grade CAD tools and hardware, students also gain enough skills and hands-on experience in advanced digital design techniques that make them job-ready. 

AU  - Amr Hassan
AU  - Ahmed Dallal
AU  - Mohamed A. S. Zaghloul
AU  - Samuel J Dickerson
CY  - Baltimore , Maryland
DA  - 2023/06/25
PB  - ASEE Conferences
TI  - Introducing High-Level Synthesis in Computer Engineering Curricula
UR  - https://peer.asee.org/43845
DO  - 10.18260/1-2--43845
ER  -