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Introducing Reconfigurable Computing In The Undergraduate Computer Engineering Curriculum

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Conference

2009 Annual Conference & Exposition

Location

Austin, Texas

Publication Date

June 14, 2009

Start Date

June 14, 2009

End Date

June 17, 2009

ISSN

2153-5965

Conference Session

New Trends in ECE Education

Tagged Division

Electrical and Computer

Page Count

12

Page Numbers

14.807.1 - 14.807.12

Permanent URL

https://peer.asee.org/5008

Download Count

38

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Paper Authors

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Arun Ravindran University of North Carolina, Charlotte

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Patricia Tolley University of North Carolina, Charlotte

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Arindam Mukherjee University of North Carolina, Charlotte

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Introducing Reconfigurable Computing in the Undergraduate Computer Engineering Curriculum

Abstract

We present our curriculum development efforts on introducing undergraduate computer engineering seniors to the emerging paradigm of high performance computing through the use of FPGA based reconfigurable computers. The prerequisites required for the course are programming using a high level language such as C/C++ or Java and an understanding of logic design, both which a typical undergraduate computer engineering student acquires at the sophomore or the junior level. An associated laboratory component was also developed, where weekly hands-on laboratory sessions serve to reinforce the ideas learned in the lecture. The course projects are drawn from a variety of disciplines which use high performance computing including bioinformatics, scientific computing, and signal processing. The course was assessed through pre and post tests, focus groups, and external evaluators drawn from faculty from other departments. Our assessments indicate that the course has had a significant impact on student understanding of digital logic design, exploitation of data parallelism in computationally intensive algorithms, and hardware-software integration issues. Our overall conclusion is that with a carefully planned syllabus, course projects, and the availability of student support resources, introducing reconfigurable computing to undergraduate computer engineering students can be a useful vehicle for teaching topics on parallel hardware and parallel algorithms.

Introduction

The availability of high speed Field Programmable Gate Arrays (FPGA) with more than a billion transistors has provided hardware designers with a platform for implementing complex high performance designs such that the programmability of general purpose processors and the performance of custom-designed hardware can be simultaneously achieved1. In a reconfigurable computer, FPGAs in conjunction with microprocessors serve as hardware accelerators for acceleration of computationally intensive tasks, delivering significant increase in performance2. However, the typical undergraduate computer engineering curriculum has yet to introduce students to this rapidly emerging computing paradigm.

Over the past couple of years, the authors, with the help of a National Science Foundation Course, Curriculum and Laboratory Improvement Grant, have developed and taught a new course titled “Hardware Acceleration using Field Programmable Gate Arrays (FPGAs)”. The course seeks to introduce undergraduate computer engineering seniors to the emerging paradigm of high performance computing through the use of FPGA based reconfigurable computers. An associated laboratory component was also developed, where weekly hands-on laboratory sessions serve to reinforce the ideas learned in the lecture. This paper focuses on three key components that describe our approach in educating computer engineers in this area of contemporary interest.

Ravindran, A., & Tolley, P., & Mukherjee, A. (2009, June), Introducing Reconfigurable Computing In The Undergraduate Computer Engineering Curriculum Paper presented at 2009 Annual Conference & Exposition, Austin, Texas. https://peer.asee.org/5008

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