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Learning About Digital Logic by Discovery

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Conference

2015 ASEE Annual Conference & Exposition

Location

Seattle, Washington

Publication Date

June 14, 2015

Start Date

June 14, 2015

End Date

June 17, 2015

ISBN

978-0-692-50180-1

ISSN

2153-5965

Conference Session

Computer Science, Computer Engineering, and Digital Systems Education 1

Tagged Division

Electrical and Computer

Page Count

16

Page Numbers

26.1062.1 - 26.1062.16

DOI

10.18260/p.24399

Permanent URL

https://peer.asee.org/24399

Download Count

204

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Paper Authors

biography

Joanne Bechta Dugan University of Virginia

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Joanne Bechta Dugan is Professor of Electrical and Computer Engineering and the Director of the Computer Engineering Programs at the University of Virginia. Her research focuses on probabilistic assessment of the dependability of computer-based systems. She has developed the dynamic fault tree model, which extends the applicability of fault tree analysis to computer systems.
Dugan holds a B.A. degree in Mathematics and Computer Science from La Salle University, and M.S. and PhD degrees in Electrical Engineering from Duke University. She is a Fellow of the IEEE.

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Abstract

Learning about Digital Logic by DiscoveryDigital Logic Design is an introductory course with no prerequisites, required by electrical engineering, computerengineering and computer science students. Rapidly increasing class size and a move to a larger lecture hallresulted in an increased barrier between the instructor and the students; students became more passive andabsenteeism increased. Hence there was a need to increase student engagement to help overcome the barrierscreated by increasing class sizes.We increased student engagement and enjoyment using three approaches, all of which are enabled by the free,open-source Logisimi software package for digital design. First, to enable learning by discovery we developed“mystery circuits” and “exploration guides” for standard combinational and sequential components (decoders,multiplexers, encoders, registers, counters, timers, etc.). Students work in pairs to “discover” the function andexplore the design approach, answering leading questions on the way. Usually these exploration guides ask thestudent to extend the design for homework.Students experience the design process using a second approach we dubbed “karaoke design” in which they aregiven a set of components arranged in a suggestive way, and are tasked to design a more complex circuit usingthe given components. Students are guided through a set of intermediate steps that allows them to experiencea logical design process. For example, a multifunction counter starts with the design of an up counter and adown counter, followed by a simple circuit that loads a value into a set of T flip flops. The final circuit combinesall the pieces together to form a 4-bit up-down counter with a parallel load capability using T flip flops.Finally, we extended the Logisim package to enable RTL design; that is we added support for design ofinterrelated datapath and controller. This extension (which we call LogisimFSM) allows the specification of thecontroller as a finite state machine, with states and transitions. Inputs and outputs connect to the datapath,providing a powerful tool for understanding the complexity and interrelations between the two. Before theLogisimFSM extension, an RTL design required the full implementation of the controller into flip-flops and gates,which made it difficult to change. Our simple extension allows students to change the controller and datapathand see the results at a slightly higher level than viewing the detailed circuit. The development of LogisimFSMallows students to see a working hardware queue (at the register transfer level) and to convert it to a stack forhomework. We have developed a full working model of a simple 3-instruction processorii and the lastassignment in the class is to add 3 more instructions.Although lectures were nearly completely eliminated in favor of active learning materials, we were able to covermore material during the semester. The most substantive measure of success came in the last 2 topics, theones that had been so hard to convey in semesters past. The use of the Logisim materials enabled much deeperunderstanding of those topics. Student performance on the tests and final exam was statistically identical topast semesters with one notable difference. More difficult problems were given on those two troublesometopics. So the students performed comparably on a more difficult exam. More detailed evaluation of resultswill be included in the paper.The materials (circuits, exploration guides, assignments, solutions, notes) are all available to other instructors touse and were developed with the support of a small grant from the university teaching resource center.i http://www.cburch.com/logisim/ The author of this paper is not affiliated with the developer of Logisim.ii The 3-instruction processor is described in the textbook that we use: Digital Design by Vahid. The author of this paper isnot affiliated with the author of the text.

Dugan, J. B. (2015, June), Learning About Digital Logic by Discovery Paper presented at 2015 ASEE Annual Conference & Exposition, Seattle, Washington. 10.18260/p.24399

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