Asee peer logo

Measuring the Jitter of Clock Signal

Download Paper |


2011 ASEE Annual Conference & Exposition


Vancouver, BC

Publication Date

June 26, 2011

Start Date

June 26, 2011

End Date

June 29, 2011



Conference Session

Simulation and Virtual Instrumentation

Tagged Division

Engineering Technology

Page Count


Page Numbers

22.1054.1 - 22.1054.12



Permanent URL

Download Count


Request a correction

Paper Authors


Chao Li Florida A&M University

visit author page

Dr. Chao Li is currently working at Florida A&M University as an assistant professor in Electronic Engineering Technology. He is teaching Electronic and Computer Engineering Technology Courses. He obtained his B.S.E.E. degree from Xi’an Jiaotong University and M.S.E.E. degree from University of Electronic Science and Technology of China. He received his PhD. in E.E. from Florida International University. He is an IEEE Member and a Member in ASEE. His research interests include signal processing, biometrics, embedded microcontroller design, and application of new instructional technology in classroom instruction.

visit author page


Antonio J. Soares Florida A&M University

visit author page

Antonio Soares was born in Luanda, Angola, in 1972. He received a Bachelor of Science degree in Electrical Engineering from Florida Agricultural and Mechanical University in Tallahassee, Florida in December 1998. He continued his education by obtaining a Master of Science degree in Electrical Engineering from Florida Agricultural and Mechanical University in December of 2000 with focus on semiconductor devices, semiconductor physics, Optoelectronics and Integrated Circuit Design. Antonio then worked for Medtronic as a full-time Integrated Circuit Designer until November 2003. Antonio started his pursuit of the Doctor of Philosophy degree at the Florida Agricultural and Mechanical University in January 2004 under the supervision of Dr. Reginald Perry. Upon completion of his Ph.D., Dr. Soares was immediately hired as an Assistant Professor (tenure-track) in the Electronic Engineering Technology department at FAMU. Dr. Soares has made many contributions to the department, from curriculum improvements, to ABET accreditation, and more recently by securing a grant with the department of education for more than half a million dollars.

visit author page

Download Paper |


Measuring the Jitter of Clock SignalIn the digital transmission system, jitter is a very important and less well known phenomenon.With the clock frequency in digital system becomes higher and higher, jitter is having moreeffect on the digital transmission system. Thus it is very important to find a way to measure jitter.This paper introduces the concept of jitter and the effect it has on the digital system. It comparesthe analog and digital methods to measure jitter. The corresponding international standard (ITU)on jitter is also introduced. It then proposed a scheme to measure the jitter of a fixed frequency(2.048MHz) PLL clock signal. This scheme uses digital method with DSP as the core. It alsoemploys CPLD in its implementation. This method has the advantage of being simple but at thesame time easy to implement.

Li, C., & Soares, A. J. (2011, June), Measuring the Jitter of Clock Signal Paper presented at 2011 ASEE Annual Conference & Exposition, Vancouver, BC. 10.18260/1-2--18335

ASEE holds the copyright on this document. It may be read by the public free of charge. Authors may archive their work on personal websites or in institutional repositories with the following citation: © 2011 American Society for Engineering Education. Other scholars may excerpt or quote from these materials with the same citation. When excerpting or quoting from Conference Proceedings, authors should, in addition to noting the ASEE copyright, list all the original authors and their institutions and name the host city of the conference. - Last updated April 1, 2015