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Session 1532

Parallel-to-Serial and Serial-to-Parallel Converters

Max Rabiee, Ph.D., P.E. University of Cincinnati

Abstract:

Microprocessors (MPUs) on a computer motherboard communicate in a parallel format with the memory system and support chips. The memory system consists of Read Only Memory (ROM), and Random Access Memory (RAM). The 8255 Programmable Peripheral Interface (PPI) is an example of such a support chip [1]. Microprocessors (MPUs) communicate in a serial format with outside peripheral devices. Serial-to-parallel and parallel-to-serial conversion must be performed to establish this communication. A few examples of outside computer peripheral devices are the modem, the printer, and the CRT terminal. In parallel communication format, all data bits are transferred at the same time through a computer data bus, while in serial communication, bits are transferred through one data line in a pulse format. Parallel data must be converted to serial data form prior to transmission to the outside peripheral device(s). The serial data received by the computer from an outside peripheral device must be converted back to a parallel format and then placed on the computer data bus [2]. The parallel data on the computer data-bus is represented by either zero or five volts (0V or 5V). However, the serial data, which is transmitted outside the computer, must be set to an industry standard voltage/current level. These standards are designed to insure that the transmitted data is immune to outside electromechanical and electromagnetic noise interference.

In this paper, we will describe the terms used in serial communication systems. Then, we will describe a project in which a digital circuit is designed to convert the parallel data to serial format. Application specific chips are available to perform the task of parallel-to-serial and serial-to- parallel conversion. One example of such an application specific chip, is the INTEL 8251A [1], which is a Universal Synchronous/Asynchronous Receiver/Transmitter (USART) chip. This chip can be programmed to convert parallel data to serial and vice versa. It can also be programmed to either transmit or receive data in asynchronous or synchronous forms. If the 8251A is programmed for asynchronous transmission, its framed data words must have at least one start bit, or possibly a one and a half, or two stop bits. In addition, the framed data words may be set to include parity bits. The 8251A is also programmed to set the serial data transmission speed rate in bits per second.

Proceedings of the 2002 American Society for Engineering Education Annual Conference & Exposition Copyright ©2002, American Society for Engineering Education

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Rabiee, M. (2002, June), Parallel To Serial And Serial To Parallel Converters Paper presented at 2002 Annual Conference, Montreal, Canada. 10.18260/1-2--11269