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Prism: The Reincarnation Of The Visible Computer

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Conference

2010 Annual Conference & Exposition

Location

Louisville, Kentucky

Publication Date

June 20, 2010

Start Date

June 20, 2010

End Date

June 23, 2010

ISSN

2153-5965

Conference Session

Software and Hardware for Educators II

Tagged Division

Computers in Education

Page Count

9

Page Numbers

15.982.1 - 15.982.9

Permanent URL

https://peer.asee.org/16600

Download Count

13

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Paper Authors

author page

Anne Clark USAF Academy, CO

author page

Brian Peterson United States Air Force Academy

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

PRISM: The Reincarnation of the Visible Computer

Abstract

For over thirty years, the United States Air Force Academy (USAFA) has used training aids to help students in our introductory digital course visualize computer architecture concepts by showing the inner workings of a simple microprocessor made primarily of the SSI and MSI chips which they were already familiar with. The original “EDUcational COMPuter” or EDUCOMP was replaced with a more visual and improved version, the “VISIble COMPuter” or VISICOMP in 19963. Today, we have transitioned these hardware training aids to a hardware description language (HDL) implementation called the Programmable Reconfigurable Informational Simple Microcomputer or PRISM. PRISM is implemented on a Field-Programmable Gate Array (FPGA) while still retaining the original strengths of the EDUCOMP/VISICOMP computer architecture.

PRISM is partitioned into the main subsystems of a computer (ALU, controller, memory, and input/output (I/O)). The controller is implemented as a simplistic, mealy state machine which allows students to see each step of the instruction cycle as an assembly language program is executed. PRISM’s operation is visual to the student since: (1) each subsystem is built with small-scale-integration (SSI) and medium-scale-integration (MSI) components which the students have already learned in our course; (2) the status of the registers, signals, and busses are displayed directly on seven-segment displays; and (3) the students manually build and test each subsystem before integrating them into the final PRISM core to observe how each one works. After understanding the basics of the computer subsystems, the students then write their own assembly programs and translate them into machine code. They can then simulate their program running ahead of time or implement and run their programs in real time.

This paper will discuss the features of PRISM and how it is used in the classroom.

Introduction

Many years ago, the Department of Electrical Engineering at the United States Air Force (USAFA) and others1,2 recognized the importance of training aids in teaching students the inner workings of a basic computer. As a result, professors developed first the “EDUcational COMPuter” or EDUCOMP and then a “VISIble COMPuter” or VISICOMP3 as part of a concerted effort to introduce student-centered tools into our digital systems track of courses4.

In the spring of 1996, VISICOMPs were introduced to students in the final portion of the sophomore introductory digital systems course after they had already been exposed to the design of combinational and sequential digital logic circuits. The underlying premise of both EDUCOMP and VISICOMP was that, by combining the small-scale-integration (SSI) and medium-scale-integration (MSI) chips that students were already familiar with into a simple computer, students would find it easier to understand how a computer works.

The VISICOMP, shown in Figure 1, was comprised of five subsystems, each on a separate printed circuit board: the controller, the arithmetic logic unit (ALU), the input/output (I/O)

Clark, A., & Peterson, B. (2010, June), Prism: The Reincarnation Of The Visible Computer Paper presented at 2010 Annual Conference & Exposition, Louisville, Kentucky. https://peer.asee.org/16600

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