Mahmoud, W. H., & Haghani, S., & Kamaha, R. (2016, June), Real-time System Implementation for Video Processing   Paper presented at 2016 ASEE Annual Conference & Exposition, New Orleans, Louisiana. 10.18260/p.26042

\bibitem{asee_peer_26042}
  Mahmoud, W. H., \& Haghani, S., \& Kamaha, R. (2016, June), \emph{Real-time System Implementation for Video Processing }
  Paper presented at 2016 ASEE Annual Conference \& Exposition, New Orleans, Louisiana.
  10.18260/p.26042

Wagdy H Mahmoud, Sasan Haghani, and Roussel Kamaha.  "Real-time System Implementation for Video Processing ".  2016 ASEE Annual Conference & Exposition, New Orleans, Louisiana, 2016, June.  ASEE Conferences, 2016.  https://peer.asee.org/26042 Internet.  24 Apr, 2024

\bibitem{asee_peer_26042}
  Wagdy H Mahmoud, Sasan Haghani, and Roussel Kamaha.
  "Real-time System Implementation for Video Processing ".
  \emph{2016 ASEE Annual Conference \& Exposition, New Orleans, Louisiana, 2016, June}.
  ASEE Conferences, 2016.
  https://peer.asee.org/26042 Internet.  24 Apr, 2024

@INPROCEEDINGS{asee_peer_26042
author = "Wagdy H Mahmoud, Sasan Haghani, and Roussel Kamaha"
title = "Real-time System Implementation for Video Processing "
booktitle = "2016 ASEE Annual Conference \& Exposition"
year = "2016"
month = "June"
address = "New Orleans, Louisiana"
publisher = "ASEE Conferences"
note = {https://peer.asee.org/26042}
number = {10.18260/p.26042}
}

TY  - CPAPER
AB  - Real time image and video processing is a requirement in many computer vision applications, e.g. video surveillance, pattern recognition, compression, object identification and tracking, feature extraction, traffic management and medical imaging. Edge detection is the most common preprocessing step in the implementation of the algorithms of video and image processing applications. The Canny edge detector is one of the most widely-used edge detection algorithms due to its superior performance.
Modern Field Programmable Gate Arrays (FPGAs) with high logic capacity, embedded multipliers and microprocessor are becoming the platform of choice for the hardware/software co-design implementations of computational-intensive applications such as image and video-processing systems
The ever-increasing complexity of digital systems including real-time video processing systems have compelled the Electronic System Level (ESL) community to switch over from Register Transfer Level (RTL) languages such as VHDL and Verilog to higher abstraction level languages such as C/C++ in order to reduce the overall design time and improve the productivity of system-level designers. Recent improvements in High Level Synthesis (HLS) tools has allowed for the development of highly-optimized video processing systems.
This paper details the results of a capstone design project to develop a real-time hardware/software video processing system to implement Canny edge detection algorithm on a Zynq FPGA platform. The HSL tool, part of the Xilinx Vivado design environment, was used to develop the hardware accelerator for the algorithm. The paper will provide an overview of Canny edge detection algorithms, the details of the hardware/software system to detect edges in a real-time 1080p full HD input video stream, and the overall performance of the designed system. The paper also details the process used to help students complete such a complex project and their contributions on the professional development of students.
Keywords - High Level Synthesis, Canny edge detection, real-time video processing systems.

AU  - Wagdy H Mahmoud
AU  - Sasan Haghani
AU  - Roussel Kamaha
CY  - New Orleans, Louisiana
DA  - 2016/06/26
PB  - ASEE Conferences
TI  - Real-time System Implementation for Video Processing 
UR  - https://peer.asee.org/26042
DO  - 10.18260/p.26042
ER  -