Louisville, Kentucky
June 20, 2010
June 20, 2010
June 23, 2010
2153-5965
Computers in Education
19
15.1115.1 - 15.1115.19
10.18260/1-2--16532
https://peer.asee.org/16532
1032
Daniel D. McCarthy, M.S.E.E., was a graduate student in the Department of Electrical and Computer
Engineering at the University of Wyoming, Laramie, WY, from which he received both the BS in Computer Engineering
and the MSEE degrees. He is a member of Tau Beta Pi and Mortar Board.
Cameron H. G. Wright, Ph.D, P.E., is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Wyoming, Laramie, WY. He was formerly Professor and Deputy Department Head of the Electrical Engineerng Deparment at the U.S. Air Force Academy. His research interests include signal and image processing, real-time embedded computer systems, biomedical instrumentation, and engineering education, and is the author or co-author of over 180 publications including papers, books, and book chapters. He is a member of ASEE, IEEE, SPIE, NSPE, BMES, Tau Beta Pi, and Eta Kappa Nu; he is an active ABET evaluator and NCEES exam committee member. E-mail: c.h.g.wright@ieee.org
Student-Created Laboratory Exercises for the Digital Systems Design Course Using HDL and PLDs
Abstract
The concepts presented in an introductory digital systems design lecture are often difficult for students to comprehend fully. In order to aid in this understanding, laboratory exercises are often assigned in order to reinforce the concepts introduced in lecture. These lab exercises also expose students to hardware, software, and hardware description languages used by indus- try professionals. We have been experimenting with a new paradigm for lab exercise creation, whereby previous students of a course are recruited to create new lab exercises for the course, a method we call “By Students, For Students” that we have tested with several different courses. This paper describes the result of applying this paradigm to a four semester hour introductory digital systems design course typically taken by sophomore electrical engineering and com- puter engineering majors. The lab exercises involve considerable use of programmable logic and the Verilog hardware description language (HDL). Interestingly, the student-created lab exercises tended to be more challenging than the previous set of faculty-created lab exercises.
1 Introduction
The concepts presented in a digital systems design lecture may be difficult for some undergraduate students to fully grasp. In order to aid in students’ understanding, laboratory exercises are often used in conjunction with traditional lectures to present tough concepts in an electrical engineering courses like digital systems design.1–5
We have been experimenting with a new paradigm for lab exercise creation, whereby previous students of a course are recruited to create new lab exercises for the course, a method we call “By Students, For Students” that we have tested with several different courses. This paper describes the lab exercises that resulted from applying this paradigm to a four semester hour introductory digital systems design course (EE2390) typically taken by sophomore electrical engineering and computer engineering majors. The course includes hands-on use of Xilinx’s professional-grade electronic design automation (EDA) software, Xilinx CPLDs, Atmel PLDs, and even one lab exer- cise using discrete logic chips. Most lab exercises involve considerable use of the Verilog hardware description language (HDL). Interestingly, the student-created lab exercises for EE2390 tended to be more challenging than the previous set of faculty-created lab exercises. Feedback from gradu- ate student Teaching Assistants (TAs) who taught both versions of the lab exercises confirms the efficacy of the student-created content.
McCarthy, D., & Wright, C., & Barrett, S., & Hamann, J. (2010, June), Student Created Laboratory Exercises For A Digital Systems Design Course Using Hdl And Plds Paper presented at 2010 Annual Conference & Exposition, Louisville, Kentucky. 10.18260/1-2--16532
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