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Teaching Digital Design in a Programmable Logic Device Arena

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Conference

2012 ASEE Annual Conference & Exposition

Location

San Antonio, Texas

Publication Date

June 10, 2012

Start Date

June 10, 2012

End Date

June 13, 2012

ISSN

2153-5965

Conference Session

CoED General Technical Session II

Tagged Division

Computers in Education

Page Count

7

Page Numbers

25.1249.1 - 25.1249.7

Permanent URL

https://peer.asee.org/22006

Download Count

56

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Paper Authors

biography

Christopher R. Carroll University of Minnesota, Duluth

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Christopher R. Carroll received a bachelor's degree from Georgia Tech, and M.S. and Ph.D. degrees from Caltech. After teaching at Duke University, he is now Associate Professor of electrical and computer engineering at the University of Minnesota, Duluth, with interests in special-purpose digital system design, VLSI, and microprocessor applications.

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Abstract

Teaching Digital Design in a Programmable Logic Device Arena Author information Omitted for reviewAbstractProgrammable logic devices have revolutionized the way in which digital circuits are built.FPGAs (Field Programmable Gate Arrays) and CPLDs (Complex Programmable Logic Devices)have become the standards for implementing digital systems. FPGAs and CPLDs offer muchhigher circuit density, improved reliability, and fewer system components when compared withtraditional digital design using discrete small-scale or medium-scale integrated circuits, all ofwhich make programmable logic devices very attractive to the digital designer. However, thesedevices hide important details involved in understanding digital fundamentals, and the resultinghardware is really more of a computer-generated black box than it is a carefully crafted, fine-tuned design. Creativity in the design is less visible when using FPGAs or CPLDs, anddesigners are not rewarded as satisfyingly for “elegant” solutions to design problems.FPGAs and CPLDs implement solutions to digital design problems quickly and economically,both qualities that are important in an industrial setting. However, in an educational setting, thesolution is not as important as understanding how the solution is reached, and theseprogrammable devices automate and hide that process, making them less attractive aseducational tools. Teaching digital design in a programmable logic device arena requires theinstructor to inform students what is going on behind the scenes in the synthesis software.Otherwise, digital design degenerates into just another programming exercise, albeit using ahardware description language rather than traditional software languages.During Fall semester 2011, programmable logic devices were used for the first time as the basisfor lab exercises in a second semester, advanced digital design laboratory at (omitted), replacingdesign using discrete digital integrated circuits. The experience exposed some limitationsimposed by the technology. For example, when circuits must avoid logic hazards (momentary“glitches” during transitions) as in asynchronous finite state machine design, FPGAs cannot beused properly, and CPLDs must be coerced into working by clumsily “fooling” the synthesissoftware. These specific digital circuit designs cannot be mapped cleanly to programmabledevices without some innovative techniques. This paper reveals some of the author’sexperiences in adapting his digital design laboratory to the programmable logic device arena.Programmable logic devices, though attractive to the experienced designer, can be awkward touse in certain educational settings. Digital design instructors must be aware of their limitations.Instructors must find creative ways around the limitations, and must restrain themselves frombeing brainwashed by the glitz of FPGAs and CPLDs. This paper identifies techniques formaintaining the excitement and rewards of creative digital design within the confined restrictionsof a programmable logic device arena.

Carroll, C. R. (2012, June), Teaching Digital Design in a Programmable Logic Device Arena Paper presented at 2012 ASEE Annual Conference & Exposition, San Antonio, Texas. https://peer.asee.org/22006

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