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Testing Strategy in Multiprocessor Systems with Cube Connections

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2011 ASEE Annual Conference & Exposition


Vancouver, BC

Publication Date

June 26, 2011

Start Date

June 26, 2011

End Date

June 29, 2011



Conference Session

Information Systems and Computing Potpourri

Tagged Division

Computing & Information Technology

Page Count


Page Numbers

22.1424.1 - 22.1424.8



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Paper Authors


Alireza Kavianpour DeVry University, Pomona

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Dr. Alireza Kavianpour received his Ph.D. Degree from University of Southern California (USC). He is currently Senior Professor at DeVry University, Pomona, CA. Dr. Kavianpour is the author and co-author of over forty technical papers all published in IEEE Journals or referred conferences. Before joining DeVry University he was a researcher at the University of California, Irvine and consultant at Qualcom Inc. His main interests are in the areas of embedded systems and computer architecture.

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Testing Strategy in multiprocessor systems with cube connectionsSystem-level testing approach in multi-computer systems in particular hypercube is the subjectstudied in this paper. An n-dimensional hypercube multi-computer system, or an n-cube forshort, contains 2n processors each of which is a self-contained computer with its own localmemory. Each processor is assigned a unique n-bit address. Two processors are linked if andonly if their addresses differ in exactly one bit position. Therefore, each processor has directcommunication links to n other processors. One-step testing of hypercubes which involves onlyone testing phase during which processors test each other is discussed. Two different kinds ofone-step testing are considered: one called the precise one-step testing and studied earlier byother researchers and the other called the pessimistic one-step testing and studied first by authorin the context of application to hypercubes. One of the two main results presented here is thatthe degree of fault tolerance of the n-dimensional hypercube (for short, n-cube), where n > 4,increases from n to 2n-2 as the testing strategy changes from the precise one-step strategy to thepessimistic one-step testing strategy. The other main result is the that if the fault bound, i.e., theupper bound on the possible number of faulty processors, is kept to the same number n in bothcases of precise and pessimistic testing, then the pessimistic strategy requires n/2+1 testing linksper processor whereas the precise strategy requires n testing links per processor. An algorithmfor selecting (n/2+1)*n/2 (2-way) links in an n-cube for use as testing links is presented.

Kavianpour, A. (2011, June), Testing Strategy in Multiprocessor Systems with Cube Connections Paper presented at 2011 ASEE Annual Conference & Exposition, Vancouver, BC. 10.18260/1-2--18740

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