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Unifying Laboratory Content Of A Digital Systems And Computer Architecture Curriculum Through Horizontal And Vertical Integration

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Conference

2008 Annual Conference & Exposition

Location

Pittsburgh, Pennsylvania

Publication Date

June 22, 2008

Start Date

June 22, 2008

End Date

June 25, 2008

ISSN

2153-5965

Conference Session

Electrical and Computer Engineering Laboratories

Tagged Division

Division Experimentation & Lab-Oriented Studies

Page Count

14

Page Numbers

13.1315.1 - 13.1315.14

Permanent URL

https://peer.asee.org/4338

Download Count

32

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Paper Authors

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Steve Naumov Purdue University Calumet

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Steve Naumov graduated in 2007 with highest distinction from Purdue University Calumet with a B.S. in Computer Engineering and minor in applied mathematics. He intends on pursuing a Ph.D. in electrical engineering from the University of Wisconsin – Madison. His research interests include high performance computer architecture, digital system verification, and computer architecture education. Along with initiating the accomplishments described in this paper, he has held two consecutive internships at Intel Corp. as a validation engineer. Contact him at naumov82@gmail.com.

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William Obermeyer Purdue University Calumet

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William J. Obermeyer is an undergraduate computer science student at Purdue University Calumet
and anticipates graduating with highest distinction in May 2008 with a Bachelor’s of Science in Computer Science, Associates of Arts in History, and minor in applied mathematics. He intends on obtaining a graduate degree in mathematics from Purdue University – Calumet to pursue his passions of education with a career in academia. Additionally, William has over ten years software development and engineering experience. Contact him at obermeyer@calumet.purdue.edu.

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Rahul Singhal Purdue University Calumet

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Rahul Singhal is pursuing a Mastes of Science in Electrical Engineering at Purdue University Calumet and intends on continuing studies at the University of Wisconsin† Madison. His research
interests include high performance microprocessors and energy-efficient digital systems. Rahul has
held two internships, one with Freescale Semiconductor and the other with Intel Corporation. Rahul graduated with highest distinction from Purdue University Calumet with a Bachelor’s of Science in Electrical Engineering in December 2006. Contact him at r.singhal17@gmail.com.

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Eduardo Garcia Purdue University Calumet

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Eduardo Garcia is employed as controls and automation engineer for ArcelorMittal Steel Corporation in Portage, Indiana. He was a recipient of the Indiana Louis Stokes Alliance for
Minority Participation (LSAMP) Fellowship award in the summer of 2003. Eduardo graduated from
Purdue University Calumet with a degree in electrical engineering with a minor in applied
mathematics. Contact him at garcia.eddie@gmail.com.

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Nasser Houshangi Purdue University Calumet

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Dr. Nasser Houshangi is professor of electrical and computer engineering at Purdue University
Calumet. His research interests include robotics, intelligent control, and multi-sensor integration.
His teaching interests include microprocessor and computer architecture, industrial automation,
adaptive control, and robotics. Nasser received a doctoral degree in electrical engineering from
Purdue University in 1990. Contact him at hnasser@calumet.purdue.edu.

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Unifying Laboratory Content of a Digital Systems and Computer Architecture Curriculum through Horizontal and Vertical Integration

Abstract

This paper describes the application of horizontal and vertical integration to unify the digital systems and computer architecture curriculum for the Department of Electrical and Computer Engineering at Purdue University Calumet. An enhanced set of twelve laboratory assignments and five design projects resulted from performing the integration. Horizontal integration was achieved by providing a consistent presentation of concepts across two computer architecture laboratory courses while simultaneously providing students the necessary skill-set for developing a successful career as a computer engineer. Vertical integration was achieved by interweaving common technical theories and skills to establish interdependence among all digital system and computer architecture laboratory coursework. The restructured laboratory sequence provides a cohesive educational experience and significant exposure to concepts, design methodologies, and software tools ubiquitous in the semiconductor and computer industry.

1. Introduction

Three digital systems and computer architecture courses are administered sequentially by the Department of Electrical and Computer Engineering at Purdue University - Calumet. The first course, ECE 370: Digital Systems – Logic Design, is a three credit hour course with a two hour lecture component and a three-hour laboratory component. The course introduces students to combinational and sequential logic design principles through the use of a hardware description language (HDL) and reconfigurable hardware. The second course, ECE 371: Microprocessor Systems, is a three credit-hour course organized into a two-hour lecture and one, three-hour laboratory session. This course introduces students to the fundamentals of computer organization and design. The third course, ECE 464: Computer Architecture and Organization, is a four credit-hour course with a three-hour lecture and one, three-hour laboratory section. This course builds on the fundamental computer organization and design concepts taught in ECE 371 by examining advanced concepts in computer architecture.

A proactive undergraduate student who completed the three course sequence observed a stable platform provided by the ECE 370 laboratory course, however, he noticed a disjoint learning experience for the two computer architecture laboratory courses. Examining the structure, approach, concepts, and tools used to administer the laboratory sections for both courses indicated a need for improvement. A more effective ECE 371 laboratory would incorporate the use of an architectural simulator and reconfigurable hardware, establish an increased emphasis on dataflow and structural digital system modeling, and expand the instruction set support of the RISC microprocessor designed in the laboratory course. The observations revealed greater concerns with the goals of the ECE 464 laboratory content. Deviating from lecture, the requirement of designing an IEEE 802.3 network repeater created a difficult learning experience for students enrolled in ECE 464. Through the Department of Electrical and Computer Engineering senior design course, a team was independently assembled to formulate and implement solutions to improve the two computer architecture laboratory sections of the three course computer engineering sequence focusing on hardware.

Naumov, S., & Obermeyer, W., & Singhal, R., & Garcia, E., & Houshangi, N. (2008, June), Unifying Laboratory Content Of A Digital Systems And Computer Architecture Curriculum Through Horizontal And Vertical Integration Paper presented at 2008 Annual Conference & Exposition, Pittsburgh, Pennsylvania. https://peer.asee.org/4338

ASEE holds the copyright on this document. It may be read by the public free of charge. Authors may archive their work on personal websites or in institutional repositories with the following citation: © 2008 American Society for Engineering Education. Other scholars may excerpt or quote from these materials with the same citation. When excerpting or quoting from Conference Proceedings, authors should, in addition to noting the ASEE copyright, list all the original authors and their institutions and name the host city of the conference. - Last updated April 1, 2015