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Virtual Prototyping Methodology As A Replacement For Physical Design In Teaching Embedded Systems

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Conference

2009 Annual Conference & Exposition

Location

Austin, Texas

Publication Date

June 14, 2009

Start Date

June 14, 2009

End Date

June 17, 2009

ISSN

2153-5965

Conference Session

Laboratory Development in ECE Education

Tagged Division

Electrical and Computer

Page Count

16

Page Numbers

14.1349.1 - 14.1349.16

DOI

10.18260/1-2--5845

Permanent URL

https://peer.asee.org/5845

Download Count

71

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Paper Authors

biography

Dietmar Moeller University of Hamburg

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DIETMAR P. F. MÖLLER is a Full and Tenure Professor of Computer Engineering at the University of Hamburg, Germany. He is Director of the McLeod Institute of Simulation Sciences at UHH and Chair of Computer Engineering. His current research interests include computational modelling and simulation, e-Learning, transportation, air-transport systems, aero¬nautical engineering, robotics, and embedded systems.

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biography

Hamid Vakilzadian University of Nebraska, Lincoln

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HAMID VAKILZADIAN is an Associate Professor of Electrical Engineering at University of Nebraska-Lincoln. He is a Region 4 PACE Chair of IEEE. His current research interests include computational modelling and simulation, microcomputers, logic design and analysis, and embedded systems.

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Virtual Prototyping Methodology as a Replacement for Physical Design in Teaching Embedded Systems

Abstract The application, versatility, and complexity of embedded systems are growing at the average rate of 14% annually. Such a growth requires acceleration in the time-to-market window while increasing yet their complexity. Due to their short design and production time the use of new and error-free design approaches that emphasize use of modern and high-level design tools and hardware/software tradeoffs are essential. These tools allow engineers to develop and test their designs before a single prototype is built. Virtual prototyping approach is relatively new methodology to permit such a design and virtual production in an integrated framework that is based on design principles that engineers perceive intuitively. It is a top down design approach for creating a virtual prototype for specification, design, simulation, and verification of hard- (HW) and software (SW) concurrently. It allows simultaneous HW and SW development and provides means for capturing information at various design stages with higher accuracy, lower cost, better efficiency at a shorter time compared to the traditional practice of design. In this paper we address issues involved in using the methodo- logy of virtual prototyping and its outcome in teaching embedded system design. This approach permits students to gain insight on the details of system level design, its perfor- mance, and its error free functionality without physically building one.

Introduction Eembedded systems are special-purpose systems designed to perform a dedicated operation, often with real-time constraints. They are usually embedded as part of a complete system/de- vice that includes HW, SW, and mechanical parts. These systems control many of the common devices in use today. Since these systems are dedicated for performing specific tasks and are produced in large quantities, it makes sense their design to be optimized. The optimization not only will reduce the size and cost of the product, it will also increase its reliability and performance.

In the traditional design approach, on the onset, the system is portioned into HW unit, SW unit, and the interface unit, as shown in Fig. 1 [1-3]. Integration of these units takes place at the end when these units are developed. In this practice, the loop L2 corresponding to design of software depends on design of hardware and the loop L1 [1-3]. However, completion of loop L1 can be slow and expensive due to fabrication and verification cost of hardware.

In addition, during the integration phase, the design flaws are exposed and since fixes in the hardware may not be easy, software is revised to make up for the hardware deficiencies. This will result in more time being spent for debugging the system which will result in slippage of the time to marker window, not considering expenses involved in the process. Furthermore, hardware designer may overlook the features that should be provided in the hardware to ease the programming process for the software designers/developers.

In the traditional approach, design of the software is postponed until hardware is developed. However, development of HW can be slow and expensive due to verification and fabrication costs.

Moeller, D., & Vakilzadian, H. (2009, June), Virtual Prototyping Methodology As A Replacement For Physical Design In Teaching Embedded Systems Paper presented at 2009 Annual Conference & Exposition, Austin, Texas. 10.18260/1-2--5845

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