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VisiBoole: Transforming Digital Logic Education

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Conference

2012 ASEE Annual Conference & Exposition

Location

San Antonio, Texas

Publication Date

June 10, 2012

Start Date

June 10, 2012

End Date

June 13, 2012

ISSN

2153-5965

Conference Session

Electrical and Computer Poster Session

Tagged Division

Electrical and Computer

Page Count

16

Page Numbers

25.1462.1 - 25.1462.16

DOI

10.18260/1-2--22219

Permanent URL

https://peer.asee.org/22219

Download Count

404

Paper Authors

author page

John J. Devore Kansas State University

author page

David L. Soldan Kansas State University

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Abstract

VisiBoole: Transforming Digital Logic EducationInstructors of digital-logic continually strived to find ways to help each student experience adigital-logic “eureka” moment, preferably early in their studies. Techniques taught to beginningstudents are straightforward. However, even students that learn these techniques easily oftenhave difficulty developing an in-depth understanding of the results they produce. This lack ofin-depth understanding makes it difficult for even these student to become fluent in hardwaredescription languages. They still struggle with creating sets of Boolean equations to describecomplex digital systems. Students that find it difficult to perform the basic operations usuallynever develop any HDL skill, and therefore choose to pursue a different area of specialization.The software tool, to be presented, provides a mechanism designed to greatly enhanceunderstanding of Boolean algebra equations, especially a related set of equations. Theseequations can be for either combinational or sequential circuits (nonregistered or registeredoutputs).This tool, called VisiBoole, provides an interactive display of a set of standard-looking equation-based hardware design language (HDL) statements. The name was intentionally patterned afterVisiCalc to suggest its spreadsheet-like characteristic. VisiBoole displays the current value ofeach variable in every equation as a color. Red indicates a value of one, while blue indicates avalue of zero. The program then calculates (simulates) the value of each output to display via itscolor as well. The program provides a spreadsheet-like interaction between the user and thedisplayed equations. Each variable can be “clicked” to toggle its value and that change willcause a reevaluation of all the outputs dependent on it. There is also a “tick” command thatsimulates the action of a clock in a sequential circuit. It causes all registered outputs to take ontheir next state. Again this change of values propagates throughout the set of equations. Aprototype program was developed and a trial use begun in a senior-level design course. Thesuccess of that experimental use and the favorable reaction of other educators that have beenshown the program (including several suggestions for enhancements) indicates that this tooldeserves development and distribution throughout the educational community.Boolean algebra is a topic in many fields of study and educational disciplines. VisiBoole couldbe a tremendous aid in courses that include the topic of Boolean algebra or of binary systems ingeneral. Most digital logic simulations run from a script providing a set of inputs and theircorresponding expected outputs. These handle small to very large designs, but offer virtually noinsight into the logic being tested. Existing “teaching” simulators animate a circuit diagram(using logic gate symbols and connecting wires) of the design. These diagrams are time-consuming to create, and often become hard to follow because it is difficult to avoid somehaphazard placement of components or complex routing of connections except on the simplest ofdesigns. VisiBoole can easily display designs that are much more than an order of magnitudemore complex than can circuit-diagram-based simulators without the set becoming difficult tocomprehend.

Devore, J. J., & Soldan, D. L. (2012, June), VisiBoole: Transforming Digital Logic Education Paper presented at 2012 ASEE Annual Conference & Exposition, San Antonio, Texas. 10.18260/1-2--22219

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