Chang, Y. I., & Clark, A. B., & Coomans, J., & Osborne, J. (2025, June), Work in Progress: Code Name 7408 - Gamifying the Logic Gate Chip Learning through Immersive Virtual Reality  Paper presented at 2025 ASEE Annual Conference & Exposition , Montreal, Quebec, Canada . 10.18260/1-2--57480

\bibitem{asee_peer_57480}
  Chang, Y. I., \& Clark, A. B., \& Coomans, J., \& Osborne, J. (2025, June), \emph{Work in Progress: Code Name 7408 - Gamifying the Logic Gate Chip Learning through Immersive Virtual Reality}
  Paper presented at 2025 ASEE Annual Conference \& Exposition , Montreal, Quebec, Canada .
  10.18260/1-2--57480

Yi-hsiang Isaac Chang, Alex Brown Clark, Jack Coomans, and Jordan Osborne.  "Work in Progress: Code Name 7408 - Gamifying the Logic Gate Chip Learning through Immersive Virtual Reality".  2025 ASEE Annual Conference & Exposition , Montreal, Quebec, Canada , 2025, June.  ASEE Conferences, 2025.  https://peer.asee.org/57480 Internet.  23 Aug, 2025

\bibitem{asee_peer_57480}
  Yi-hsiang Isaac Chang, Alex Brown Clark, Jack Coomans, and Jordan Osborne.
  "Work in Progress: Code Name 7408 - Gamifying the Logic Gate Chip Learning through Immersive Virtual Reality".
  \emph{2025 ASEE Annual Conference \& Exposition , Montreal, Quebec, Canada , 2025, June}.
  ASEE Conferences, 2025.
  https://peer.asee.org/57480 Internet.  23 Aug, 2025

@INPROCEEDINGS{asee_peer_57480
author = "Yi-hsiang Isaac Chang, Alex Brown Clark, Jack Coomans, and Jordan Osborne"
title = "Work in Progress: Code Name 7408 - Gamifying the Logic Gate Chip Learning through Immersive Virtual Reality"
booktitle = "2025 ASEE Annual Conference \& Exposition "
year = "2025"
month = "June"
address = "Montreal, Quebec, Canada "
publisher = "ASEE Conferences"
note = {https://peer.asee.org/57480}
number = {10.18260/1-2--57480}
}

TY  - CPAPER
AB  - IC 7408, a Quad 2-Input AND Gate, is a good candidate for learning logic circuits. This IC is widely used in digital circuits and programmable logic controls to perform basic AND operations. Nevertheless, the domain knowledge could overwhelm the novice when considering the relationship between the built-in four AND Gates, the truth table, the interpretation of a given schematic, and the construction of the physical circuit.

This paper describes an ongoing project designed to gamify the students’ learning of IC 7408. An immersive virtual reality (VR) environment will help the learners visualize how the AND Gate works while familiarizing themselves with its user interface. The learners will then use the four AND Gates to construct a virtual 7408 chip by following its conceptual design, and this virtual 7408 chip will then be used to build a logic circuit. As the learner is miniaturized in the VR environment, connecting the water-hose-like wires to the virtual chipset to drive the components could be an exciting experience and might reinforce their learning.

In addition to evaluating the learner’s knowledge retention after six weeks, the effectiveness of the treatment will also be assessed by measuring the learners’ speed and quality in constructing a logic circuit with the physical IC 7408. A post-test survey will measure individuals’ self-efficacy in this subject and feedback on the VR app and lab exercises. Future work will be discussed to conclude this paper.
AU  - Yi-hsiang Isaac Chang
AU  - Alex Brown Clark
AU  - Jack Coomans
AU  - Jordan Osborne
CY  - Montreal, Quebec, Canada 
DA  - 2025/06/22
PB  - ASEE Conferences
TI  - Work in Progress: Code Name 7408 - Gamifying the Logic Gate Chip Learning through Immersive Virtual Reality
UR  - https://peer.asee.org/57480
DO  - 10.18260/1-2--57480
ER  -