Penn State University - Berks Campus - Reading, Pennsylvania
October 6, 2017
October 6, 2017
October 7, 2017
Mid-Atlantic Section Fall Conference
7
10.18260/1-2--29387
https://peer.asee.org/29387
22906
Dr. Dugwon Seo is an assistant professor in Engineering Technology Department at Queensborough Community College. Dr. Seo has been teaching engineering technology courses including digital circuit, computer applications, computer-aided analysis, and renewable energy. Her research interest includes various renewable energy, digital circuit system, remote sensing, and technology education.
Digital Logic Design is a fundamental course in both Computer and Electrical Engineering Technology fields and as such it is important for the course to provide students a good understanding and continuous interest. Project-based learning allows students to gain knowledge and skills by solving real-world problems and helps to develop critical thinking, teamwork and self-management skills. In this paper, a description of the effective and innovative logic circuit design project is presented. This project can be used in class with first year community college students in Electrical and Computer Engineering Technology fields. The objective is to design a logic circuit to control a motorized device that moves by a signal from photocell sensors. The project exercises using Boolean logic functions, conducting a truth table, and assembling the logic gates to design the circuit that transmits the signals between photocell sensors and two motors. This covers the theoretical parts of the digital logic system. In addition to digital electronics understanding, the project delivers interdisciplinary features that bring knowledge of mechanics, circuit analysis, and 3-D printer use to the students. Through the practice of the student-driven project-based learning method, the students are expected to succeed in their transitions to higher-degree education and in their future STEM careers.
Seo, D., & Mangra, D. (2017, October), Project-Based Learning of Digital Logic Circuit Design Paper presented at 2017 Mid-Atlantic Section Fall Conference, Penn State University - Berks Campus - Reading, Pennsylvania. 10.18260/1-2--29387
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