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Incorporating HDL Based Design Flow in EET Curriculum Abstract:

Based on industry trends and advances in silicon manufacturing technology in recent years, it is becoming apparent that future electrical and computer engineers will most likely implement their digital designs using programmable logic devices such as CPLDs and FPGAs, rather than discreet IC components. They may also encounter electronic systems built on such devices in their engineering practice. Therefore, it has become necessary to incorporate related design techniques into courses even at the undergraduate level. This paper discusses the introduction of and teaching of such courses to undergraduates majoring in the Electrical Engineering Technology program at the University of Pittsburgh at Johnstown (UPJ).

The paper also describes several considerations taken into account during the adaptation of Hardware Description Languages (HDL) and automation based digital design flow to the UPJ curriculum. The demographics of UPJ’s student population and their immediate careers suggest that most graduates do not pursue graduate studies in computer engineering, nor do they seek employment related to design and manufacture of integrated circuit components. As a result, a detailed in depth study of modern digital design methodologies is not a necessity.

The paper explains the course topics and the related laboratory assignments of the core digital electronics course for UPJ undergraduates. The results from a student survey taken at the end of the course to gauge the effectiveness of HDL and associated tools in learning digital electronics are also discussed. The paper elaborates on advantages and disadvantages of using HDL based circuit design in the undergraduate engineering technology curriculum as seen by students.

Section I: Introduction:

In the not too distant past, student assignments in digital design courses consisted primarily of paper designs, or at best such as in senior design projects they were a large morass of SSI and MSI (Small and Medium Scale Integration) silicon devices plugged on to circuit boards or wiring boards. More time was spent on debugging the connections and wirings than on actual design or in determining functionalities of the system. Even after HDLs such as VHDL have become standards and widely being used in industry, undergraduate academic curriculums in Electrical and Computer engineering were very slow to adopt them [1] because of the cost of the hardware and associated Computer Aided Design (CAD) tools required for digital designs.

Even those college level courses that utilized HDL, the designs were limited to use them only for design and simulation stages, and not for hardware implementations. This scenario started to change gradually with the advent of cheaper computers, inexpensive Programmable Logic Devices (PLDs), and the associated development environments. Although the availability and cost of using a programmable logic design methodology was initially prohibitive for most academic environments, this is no longer the case. The

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KARUNARATNE, M., & Dick, G. (2008, June), Incorporating Hdl Based Design Flow In Eet Curriculum Paper presented at 2008 Annual Conference & Exposition, Pittsburgh, Pennsylvania. 10.18260/1-2--4143