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A Novel Project-Oriented System on Chip (SoC) Design Course for Computer and Electrical Engineers

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Conference

2022 ASEE Annual Conference & Exposition

Location

Minneapolis, MN

Publication Date

August 23, 2022

Start Date

June 26, 2022

End Date

June 29, 2022

Conference Session

Electrical and Computer Engineering Laboratory and SoC Developments

Page Count

9

DOI

10.18260/1-2--40854

Permanent URL

https://peer.asee.org/40854

Download Count

292

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Paper Authors

biography

Bill Carroll The University of Texas at Arlington

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Bill Carroll is Professor of Computer Science and Engineering at The University of Texas at Arlington (UTA). He has been a UTA faculty member since 1981 and also has held faculty positions at Auburn University and visiting appointments at the University of California-Berkeley and the University of Washington. He has held engineering positions at Texas Instruments and General Dynamics. Carroll received B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Texas at Austin. He is a Life Fellow of the Institute for Electrical and Electronics Engineers (IEEE) and a licensed professional engineer in Texas and Alabama.

Carroll has co-authored three textbooks, a tutorial book, and numerous papers and technical reports. He has received an American Society for Engineering Education Outstanding Young Faculty Award, two National Aeronautics and Space Administration Technology Innovation Awards, and three IEEE Computer Society Service Awards. He is an IEEE Computer Society Golden Core Member and a recipient of the IEEE Third Millennium Medal.

Carroll served as chair of the UTA Faculty Senate from September 1, 2019 to August 31, 2021. He served as Dean of the College of Engineering at UTA from January 1, 2000 to August 31, 2011 and chair of CSE from June 1981 to August 1999.

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Jason Losh The University of Texas at Arlington

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Abstract

This paper describes a novel project-oriented system on chip (SoC) design course. The course is taught in the Computer Science and Engineering (CSE) Department at the University of Texas at Arlington and is offered as CSE 4356 System on Chip Design for computer engineering undergraduates, as CSE 5356 for computer engineering graduate students, and as EE 5315 for electrical engineering graduate students. It is taught as one course combining all numbers. All students are given the same lectures, course materials, assignments, and projects. Grading standards and expectations are the same for all students as well. The course in its current form was first offered in fall 2020 and was taught online due to COVID-19 restrictions. The course was offered again in fall 2021 in a traditional on-campus, in-person mode of delivery. Two seasoned educators, with more than eighty years of total teaching experience, combined to team teach the course. One also brought more than thirty years of industrial design experience to the course. SoC FPGA devices have been available for use by designers for more than 10 years and are widely used in applications that require both an embedded microcomputer and FPGA-based logic for real-time computationally-intense solutions. Such solutions require skills in C programming, HDL programming, bus topologies forming the bridge between FPGA fabric and the microprocessor space, Linux operating systems and virtualization, and kernel device driver development. The breadth of the skills that were conveyed to students necessitated a team teaching approach to leverage the diverse background of the instructors. With such a wide range of topics, one of the biggest challenges was developing a course that was approachable for a greatly varied population of students – a mix of Computer Engineering (CpE) and Electrical Engineering (EE) students at both the graduate and undergraduate level. Another, perhaps less obvious, challenge was the inherently application focus of the course, which presents challenges to many graduate students whose undergraduate degree lacked a robust hands-on design experience. Selection of an appropriate project was key to making the course effective and providing a fun learning experience for students. The projects were aligned to relevant industry applications, stressing complex modern intellectual property (IP) work flows, while still being approachable to students. The design of a universal asynchronous receiver transmitter (UART) IP module in 2020 and a serial peripheral interface (SPI) IP module in 2021 were chosen as the projects for the first two offerings of the course. The Terasic/Intel DE1-SoC development board and Intel Quartus Prime 18.1 design software were the technologies chosen for the course. The development board and basic test instruments were provided to each student in a take-home lab kit. The system on chip design course has proven to be a popular but challenging course for our undergraduate and graduate students in computer engineering and electrical engineering. The course has demonstrated that it is possible to successfully teach an advanced design-oriented course to students of varying majors, levels, educational backgrounds, and cultures.

Carroll, B., & Losh, J. (2022, August), A Novel Project-Oriented System on Chip (SoC) Design Course for Computer and Electrical Engineers Paper presented at 2022 ASEE Annual Conference & Exposition, Minneapolis, MN. 10.18260/1-2--40854

ASEE holds the copyright on this document. It may be read by the public free of charge. Authors may archive their work on personal websites or in institutional repositories with the following citation: © 2022 American Society for Engineering Education. Other scholars may excerpt or quote from these materials with the same citation. When excerpting or quoting from Conference Proceedings, authors should, in addition to noting the ASEE copyright, list all the original authors and their institutions and name the host city of the conference. - Last updated April 1, 2015