Raeisi, R., & Gopala, V. S. R. (2017, April), A Study of Emerging Memory Technology in Hybrid Architectural Approaches of GPGPU  Paper presented at 2017 Pacific Southwest Section Meeting, Tempe, Arizona. 10.18260/1-2--29201

\bibitem{asee_peer_29201}
  Raeisi, R., \& Gopala, V. S. R. (2017, April), \emph{A Study of Emerging Memory Technology in Hybrid Architectural Approaches of GPGPU}
  Paper presented at 2017 Pacific Southwest Section Meeting, Tempe, Arizona.
  10.18260/1-2--29201

Reza Raeisi and Vidya sagar reddy Gopala P.E..  "A Study of Emerging Memory Technology in Hybrid Architectural Approaches of GPGPU".  2017 Pacific Southwest Section Meeting, Tempe, Arizona, 2017, April.  ASEE Conferences, 2017.  https://peer.asee.org/29201 Internet.  15 Dec, 2024

\bibitem{asee_peer_29201}
  Reza Raeisi and Vidya sagar reddy Gopala P.E..
  "A Study of Emerging Memory Technology in Hybrid Architectural Approaches of GPGPU".
  \emph{2017 Pacific Southwest Section Meeting, Tempe, Arizona, 2017, April}.
  ASEE Conferences, 2017.
  https://peer.asee.org/29201 Internet.  15 Dec, 2024

@INPROCEEDINGS{asee_peer_29201
author = "Reza Raeisi and Vidya sagar reddy Gopala P.E."
title = "A Study of Emerging Memory Technology in Hybrid Architectural Approaches of GPGPU"
booktitle = "2017 Pacific Southwest Section Meeting"
year = "2017"
month = "April"
address = "Tempe, Arizona"
publisher = "ASEE Conferences"
note = {https://peer.asee.org/29201}
number = {10.18260/1-2--29201}
}

TY  - CPAPER
AB  - Recent trends of drastic improvement speed of the processors have led to application of General Purpose Computing on Graphics Processing Units (GPGPU). We intend to present an educational study of two different hybrid architectural approaches for designing global memories of GPGPUs using different hybridization techniques. We address a hybrid memory organization and design of GPGPU considering emerging memory technology such as Spin Transfer Torque Random Access Memory (STT-RAM), Resistive Random Access Memory (RRAM) and Phase Change Memory (PCM) with conventional Dynamic Random Access (DRAM) memory. PCM memory technology provides inexpensive, fast access time, and high density nonvolatile storage. STT-RAM and RRAM are the new energy-efficient memory alternate for Dynamic and Static Random Access Memory technologies. The General purpose GPU’s global memory consumes a considerable amount of total power of GPGPU. Using hybridization memory organization technique, the leakage power can be scaled to a minimal amount, such that the power and performance can be optimized.  We do present the survey on two-hybrid memory architecture approaches that use PCM and combination of RRAM, STT-RAM along with the conventional DRAM memory. We discuss two main issues that designers face while designing hybrid memory architecture approach. A simple flowchart technique will be used to illustrate memory usage behavior and data migration issues that are seen while hybridizing the Global memory of GPGPU. Various memory access patterns will also be discussed in detail. Our primary purpose is to present and share our learning experience obtained through survey with others by highlighting similarities and differences between memory technology, and the current emerging memory technology in GPGPU architecture based on parameters and characteristics.
AU  - Reza Raeisi
AU  - Vidya sagar reddy Gopala P.E.
CY  - Tempe, Arizona
DA  - 2017/04/20
PB  - ASEE Conferences
TI  - A Study of Emerging Memory Technology in Hybrid Architectural Approaches of GPGPU
UR  - https://peer.asee.org/29201
DO  - 10.18260/1-2--29201
ER  -