Portland, Oregon
June 23, 2024
June 23, 2024
June 26, 2024
Electrical and Computer Engineering Division (ECE)
7
10.18260/1-2--46560
https://peer.asee.org/46560
83
I am a part time Instructor at Portland State University of the Assertion Based Verification Course. I work full-time at Intel.
A graduate Student at Portland State University, currently focused on validation and verification methodologies in my research.
The traditional method of functional verification of digital designs in industry has been simulation. However, due to increase in design complexity and size, the traditional approach of simulation is becoming a bottleneck to achieve desired level of coverage and functional correctness. Due to the same reason, formal verification is becoming one of the widely used methodology for functional verification of RTL designs in industry. This paper focuses on designing a graduate level course to introduce assertion based formal verification into the graduate Electrical and Computer Engineering curriculum at Portland State University (PSU). The course is unique for the application of formal methods using industrial tools. We describe approaches designed to make students familiar with what, why and where of formal verification, while designing projects to give them hands on experience with formal verification tools like VC Formal. Our successful experience demonstrates an effective path of applying industrial formal method tools in graduate education programs.
Sharma, S., & Song, X., & Ghonim, M., & Zhang, J. (2024, June), An Industrial Tool Based Graduate Class in ECE Design Verification Curriculum Paper presented at 2024 ASEE Annual Conference & Exposition, Portland, Oregon. 10.18260/1-2--46560
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