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Scott Koziol
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Paper listing
Permanent URL
https://peer.asee.org/authors/45771
Co-authors:
Jacob Boline
Matthew Carrano
Eugene Chabot
John DiCecco
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FPGA/MATLAB Hardware in the Loop Testbed for Stochastic Artificial Neural Networks
Collection
ASEE 2021 Gulf-Southwest Annual Conference
Authors
Matthew Carrano,
Baylor University
;
Scott Koziol,
Baylor University
; Eugene Chabot,
University of Rhode Island
; Jacob Boline; John DiCecco
