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Xiaowei Yu
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Paper listing
Permanent URL
https://peer.asee.org/authors/73959
Co-authors:
Lawrence Hmurcik
Borui Li
Xingguo Xiong
Bo Zhang
Implementation of an 8-bit Low-power Multiplier based on Reversible Gate Technology
Collection
2014 ASEE Zone 1 Conference
Authors
Borui Li;
Xiaowei Yu
; Bo Zhang; Xingguo Xiong; Lawrence Hmurcik
