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Beyond Vhdl Simulation To On Chip Testing

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Collection

2008 Annual Conference & Exposition

Location

Pittsburgh, Pennsylvania

Publication Date

June 22, 2008

Start Date

June 22, 2008

End Date

June 25, 2008

ISSN

2153-5965

Conference Session

Innovations in ECE Education II

Tagged Division

Electrical and Computer

Page Count

13

Page Numbers

13.251.1 - 13.251.13

Permanent URL

https://peer.asee.org/3258

Download Count

50

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Paper Authors

biography

Ronald Hayne The Citadel

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Ronald J. Hayne, PhD, is an Assistant Professor in the Department of Electrical and Computer
Engineering at The Citadel. His professional areas of interest are digital systems and hardware
description languages. He is a retired Army Colonel with experience in academics and Defense
laboratories.

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Beyond VHDL Simulation to On-Chip Testing

Abstract

Digital systems design relies heavily on hardware description languages and their associated software tools. While VHDL allows functional verification of designs, simulation alone cannot prepare our students for the technical challenges associated with the final translation to actual hardware.

Field programmable gate arrays (FPGAs) allow rapid prototyping of digital designs on a single chip. This tight integration presents additional challenges when it comes to testing the final hardware, because access to internal signals is limited. ChipScope™ Pro integrates key logic analyzer components with the target design inside the FPGA.

A program of instruction has been developed at The Citadel that uses VHDL, FPGAs, and ChipScope™ Pro to teach advanced digital systems design. Examples are modeled and simulated using VHDL, then synthesized to FPGAs with embedded logic analyzer cores. The final hardware implementations are demonstrated using ChipScope™ Pro to provide access to on-chip signals.

Designs include a binary multiplier and a reduced instruction set computer (RISC) processor. These textbook examples are turned into functional prototypes, bridging the gap between theory and hardware. Ultimately, the use of these integrated design tools provides a more robust learning experience that moves beyond VHDL simulation to on-chip testing.

Introduction

Modern digital systems design relies heavily on hardware description languages, such as VHDL, and their associated software tools. Most important in an educational environment is logic simulation, which allows functional verification of designs without the need for hardware implementation. While this allows quick investigation of multiple design examples, simulation alone cannot prepare our students for the technical challenges associated with the final translation to actual hardware.

Programmable logic devices provide an integrated platform for implementation of digital circuits. Mapping designs to hardware provides students additional experience and insights associated with synthesis and device programming tools. FPGAs allow rapid prototyping of digital designs on a single chip, eliminating the need for multiple devices and error-prone external wiring. This tight integration presents additional challenges when it comes to testing the final hardware. Access to internal signals is limited, often making debugging more difficult.

Development Options

A quick web survey of undergraduate digital systems design courses revealed two basic approaches, lecture and lab. Lecture courses taught hardware description languages and relied

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