Limbrick, D., & Garcia Suarez, L. M., & Cummings II, D. (2024, June), Board 53: Work in Progress: Engaging the Next-Generation of IC Designers with Puzzle-Solving Competitions  Paper presented at 2024 ASEE Annual Conference & Exposition, Portland, Oregon. https://peer.asee.org/47050

\bibitem{asee_peer_47050}
  Limbrick, D., \& Garcia Suarez, L. M., \& Cummings II, D. (2024, June), \emph{Board 53: Work in Progress: Engaging the Next-Generation of IC Designers with Puzzle-Solving Competitions}
  Paper presented at 2024 ASEE Annual Conference \& Exposition, Portland, Oregon.
  https://peer.asee.org/47050

Daniel Limbrick, Laura Marcela Garcia Suarez, and Deriech Cummings II.  "Board 53: Work in Progress: Engaging the Next-Generation of IC Designers with Puzzle-Solving Competitions".  2024 ASEE Annual Conference & Exposition, Portland, Oregon, 2024, June.  ASEE Conferences, 2024.  https://peer.asee.org/47050 Internet.  30 Jul, 2024

\bibitem{asee_peer_47050}
  Daniel Limbrick, Laura Marcela Garcia Suarez, and Deriech Cummings II.
  "Board 53: Work in Progress: Engaging the Next-Generation of IC Designers with Puzzle-Solving Competitions".
  \emph{2024 ASEE Annual Conference \& Exposition, Portland, Oregon, 2024, June}.
  ASEE Conferences, 2024.
  https://peer.asee.org/47050 Internet.  30 Jul, 2024

@INPROCEEDINGS{asee_peer_47050
author = "Daniel Limbrick, Laura Marcela Garcia Suarez, and Deriech Cummings II"
title = "Board 53: Work in Progress: Engaging the Next-Generation of IC Designers with Puzzle-Solving Competitions"
booktitle = "2024 ASEE Annual Conference \& Exposition"
year = "2024"
month = "June"
address = "Portland, Oregon"
publisher = "ASEE Conferences"
note = {https://peer.asee.org/47050}
}

TY  - CPAPER
AB  - The traditional path to learning how to design integrated circuits (ICs) with very-large-scale integration (VLSI) requires undergraduate students to take courses in digital logic, introductory circuits, electronics, and introductory VLSI design. If they are lucky, by senior year, they have mastered the art of designing a logic primitive, e.g., a CMOS inverter or a simple circuit, e.g., a full adder. With this knowledge, they have the foundation to pursue graduate studies in VLSI design, which, depending on the university, includes a course that introduces them to logic synthesis and physical design. This approach to teaching VLSI has a lot of shortcomings: (1) students with the desire to design a microprocessor from scratch have to delay gratification for several years, (2) students must appreciate and have a strong aptitude for each step of the VLSI design process in sequential order, (3) most universities do not offer the full sequence of courses needed, and (4) exposure to skills needed is usually not available until the students have already committed to a career path.

This paper describes an approach to expose students to advanced VLSI concepts and algorithms needed to design a complex IC by having them compete in a puzzle solving competition. The game requires a player to connect dots with lines while satisfying certain constraints. Such a game would instill VLSI physical design concepts and be accessible to students of all ages. A similar commercially available game, Flow Free, runs on Android/iOS platforms. The game's objective is similar to the wire-routing problem in integrated circuit design. Flow Free has three constraints: (1) dots of the same color must connect, (2) lines cannot overlap, and (3) every space must be filled with a line. This paper also provides recommendations for modifying the game to more closely match VLSI physical design problems.
AU  - Daniel Limbrick
AU  - Laura Marcela Garcia Suarez
AU  - Deriech Cummings II
CY  - Portland, Oregon
DA  - 2024/06/23
PB  - ASEE Conferences
TI  - Board 53: Work in Progress: Engaging the Next-Generation of IC Designers with Puzzle-Solving Competitions
UR  - https://peer.asee.org/47050
ER  -