Cedarlogic ? A New Graphical Digital Logic Cad Tool
- Conference
- Location
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Honolulu, Hawaii
- Publication Date
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June 24, 2007
- Start Date
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June 24, 2007
- End Date
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June 27, 2007
- ISSN
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2153-5965
- Conference Session
- Tagged Division
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Electrical and Computer
- Page Count
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15
- Page Numbers
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12.348.1 - 12.348.15
- DOI
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10.18260/1-2--2649
- Permanent URL
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https://peer.asee.org/2649
- Download Count
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5529
Paper Authors
Clint Kohl Cedarville University
Dr. Kohl serves as Associate Professor of Computer Engineering at Cedarville University. He earned his B.S.E.E. from South Dakota State University, his M.S.E.E. from University of North Dakota, and his Ph.D. in Computer Engineering from Iowa State University. His areas of interest include digital electronics, computer architecture, programmable logic devices, and microprocessor systems.
Keith Shomper Cedarville University
Dr. Shomper serves as an Associate Professor of Computer Science and has been at Cedarville Universtiy since August 2003. He received his B.A. in Mathematics from the University of Northern Colorado (1983) and his M.S. in Computer Science from the Air Force Institute of Technology (1984). Dr. Shomper received his Ph.D. in Computer Science from the Ohio State University (1993), specializing in computer graphics with minors in software engineering and distributed computing. His dissertation was in the area of visual degugging of computer programs. Dr. Shomper's research interests include computer graphics, distrubuted simulation, and virtual reality.
Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract
CedarLogic - a new Graphical Digital Logic CAD tool to aid in the teaching of Digital Logic Design.
Abstract
This paper describes, "CedarLogic" a graphical digital logic simulator that three senior undergraduate students created in fulfillment of their Senior Design Capstone course in the 2005- 2006 academic year. This educationally valuable software is being effectively used in an introductory Digital Logic Design (DLD) course. This paper presents the background and need for this type of software tool, a brief analysis of currently available tools and then explains its functionality and usefulness.
This easy to use logic simulator is valuable in both Digital Logic Design lectures and labs. The environment is graphical in nature and allows the user to very quickly build a logic circuit by clicking and dragging components from the reasonably complete library of gates and functions including: AND, OR, NOT, NAND, NOR, XOR, Multiplexers, Decoders, Adders, Comparators, Flip-Flops, Counters, Registers, RAM, ROM, and numerous Input and Output options. One of the most helpful features of this software is the simultaneous build and simulate environment with wires colored according to their logic value (Red for logic High and Black for logic Low). This allows the user to quickly understand how the logic is working and, if it is not working properly, to correct mistakes. The freshman students using this program for the first time have found it to be stable, helpful and in some cases even "fun" to play with and design.
The paper concludes with some lessons learned through the Senior Design Capstone experience from which this multi-threaded software was designed, written, debugged, revised and released for experimentation in DLD. CedarLogic's 10,000+ lines of code is written in C++ and utilizes the wxWidgets GUI library and OpenGL to render the graphics. CedarLogic can be freely downloaded at http://sourceforge.net/projects/cedarlogic .
Background and Need
Digital Logic Design is a foundational course for many engineering and computer science students. The first author has been teaching a freshman level Digital Logic Design course for over twelve years. The course includes laboratory projects in which students physically wire up TTL gates on a breadboard, use the CedarLogic software tool to build more complex circuits and are briefly exposed to Altera’s Quartus II commercial logic software.
We believe student learning can be accelerated and enhanced by the effective use of logic simulation software. A student can connect a TTL logic circuit in lab and observe its functionality by flipping switches and watching LED’s light and still not understand how each
Kohl, C., & Shomper, K. (2007, June), Cedarlogic ? A New Graphical Digital Logic Cad Tool Paper presented at 2007 Annual Conference & Exposition, Honolulu, Hawaii. 10.18260/1-2--2649
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