GIFTS: Templating Circuit Sub-Systems to Improve Outcomes in a First-Year Circuit Design Project

Brian Scott Krongold; Gavin Buskes

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Conference: 2024 ASEE Annual Conference & Exposition
Location: Portland, Oregon
Publication Date: June 23, 2024
Start Date: June 23, 2024
End Date: July 12, 2024
Conference Session: First-Year Programs Division GIFTS: Great Ideas For Teaching Students
Tagged Division: First-Year Programs Division (FYP)
Permanent URL: https://peer.asee.org/47505

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Paper Authors

biography

Brian Scott Krongold University of Melbourne orcid.org/0000-0003-1619-3516

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Brian Krongold received the B.S., M.S., and Ph.D. degrees in electrical engineering in 1995, 1997 and 2001, respectively, from the University of Illinois at Urbana-Champaign, and worked there as a Research Assistant at the Coordinated Science Laboratory from 1995-2001. From December 2001 to December 2004, he was a Research Fellow in the ARC Special Research Centre for Ultra-Broadband Information Networks in the Department of Electrical and Electronic Engineering at the University of Melbourne, Australia. He was awarded an ARC Postdoctoral Research Fellowship and held this from 2005 to 2008, He is currently a Professor at the University of Melbourne.

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Gavin Buskes University of Melbourne orcid.org/0000-0002-7920-8052

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Gavin is a Professor and Deputy Head (Academic) in the Department of Electrical and Electrical Engineering at the University of Melbourne, Australia. He teaches a wide range of engineering subjects and has research interests in optimal control, idea generation, prior knowledge and developing professional skills. He also holds the role of Assistant Dean (Teaching and Learning) in the Faculty of Engineering and Information Technology.

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Abstract

This GIFTS paper describes a circuit sub-system templating approach to improve outcomes in a first-year multidisciplinary project-based course. Electrical circuits can be a challenging component of such projects due to the confluence of having to understand the underlying mathematics and physics, being introduced to new and abstract concepts, and the construction and debugging issues associated with breadboarding. Simple circuits with few components are more manageable for students but not particularly novel or inspiring, whereas more complex circuits with several interconnected sub-systems can embody meaningful applications but are problematic due to their complexity. One relatively safe approach to circumvent some of these issues, while maintaining complexity, is to provide students with a breadboarded image of the full circuit to copy, then have them select certain circuit component values.

On the other extreme is the high-risk, (potentially) high-reward approach where students freely breadboard from schematic diagrams with component values they determine to meet desired design goals. Such a ‘free-form’ approach was used in the first offering of our project-based course XXXXXX in 2022. Students had four high-level tasks as part of the 5-week electrical part of a speaker and audio system project: digest some basic theory, design components and select circuit element values, spatially convert a schematic to a breadboard, test and potentially debug (loose connections, improper/incorrect circuit topologies, incorrect device values, etc.). The most basic working design contained an appreciable number of components: 8 two-terminal passive components (resistors and capacitors), 2 three-terminal components (trimpots), 4 eight-pin 741 op-amp ICs, and many jumper wires.

The unfortunate result of this approach was students focussed significant amounts of time on debugging poorly constructed, non-working circuits, which detracted from the project’s learning objectives and limited opportunities to observe the phenomena that the theory was describing. Due to the nature of circuit building essentially being a one-person process and students having different ways of spatially mapping schematics to a breadboard, debugging in a team context was difficult. Staff were consequently overwhelmed with debugging help requests, which were time consuming due to wildly varying implementations.

In 2023, to achieve a compromise between the breadboard-copy and free-form approaches, we decided to adopt a somewhat hybrid approach. Students were first instructed to freely breadboard and test simple circuits such as first-order passive filters. We then provided them with ‘black box’ templates for larger, sub-systems such as active filters where they copied their own ‘free-form’ circuits inside the boxes to make implementation and debugging easier and require less staff assistance. This method also helped students better understand the sub-system approach of tackling a larger design project while reducing concerns about breadboard implementation.

Overall, teaching staff reported a noticeable decrease in time spent debugging students’ circuits during semester, while observations of the final project demonstrations indicated that more students met or exceeded the project’s minimum objectives than the previous year. Discussions with groups during the project assessment highlighted the ease at which students within the group could all identify the various sub-systems comprising the project, in stark contrast to the year before.

Citation
Format

Krongold, B. S., & Buskes, G. (2024, June), GIFTS: Templating Circuit Sub-Systems to Improve Outcomes in a First-Year Circuit Design Project Paper presented at 2024 ASEE Annual Conference & Exposition, Portland, Oregon. https://peer.asee.org/47505

TY  - CPAPER
AB  - This GIFTS paper describes a circuit sub-system templating approach to improve outcomes in a first-year multidisciplinary project-based course. Electrical circuits can be a challenging component of such projects due to the confluence of having to understand the underlying mathematics and physics, being introduced to new and abstract concepts, and the construction and debugging issues associated with breadboarding. Simple circuits with few components are more manageable for students but not particularly novel or inspiring, whereas more complex circuits with several interconnected sub-systems can embody meaningful applications but are problematic due to their complexity.  One relatively safe approach to circumvent some of these issues, while maintaining complexity, is to provide students with a breadboarded image of the full circuit to copy, then have them select certain circuit component values. 

On the other extreme is the high-risk, (potentially) high-reward approach where students freely breadboard from schematic diagrams with component values they determine to meet desired design goals. Such a ‘free-form’ approach was used in the first offering of our project-based course XXXXXX in 2022.  Students had four high-level tasks as part of the 5-week electrical part of a speaker and audio system project: digest some basic theory, design components and select circuit element values, spatially convert a schematic to a breadboard, test and potentially debug (loose connections, improper/incorrect circuit topologies, incorrect device values, etc.). The most basic working design contained an appreciable number of components: 8 two-terminal passive components (resistors and capacitors), 2 three-terminal components (trimpots), 4 eight-pin 741 op-amp ICs, and many jumper wires.

The unfortunate result of this approach was students focussed significant amounts of time on debugging poorly constructed, non-working circuits, which detracted from the project’s learning objectives and limited opportunities to observe the phenomena that the theory was describing.  Due to the nature of circuit building essentially being a one-person process and students having different ways of spatially mapping schematics to a breadboard, debugging in a team context was difficult.  Staff were consequently overwhelmed with debugging help requests, which were time consuming due to wildly varying implementations. 

In 2023, to achieve a compromise between the breadboard-copy and free-form approaches, we decided to adopt a somewhat hybrid approach. Students were first instructed to freely breadboard and test simple circuits such as first-order passive filters. We then provided them with ‘black box’ templates for larger, sub-systems such as active filters where they copied their own ‘free-form’ circuits inside the boxes to make implementation and debugging easier and require less staff assistance. This method also helped students better understand the sub-system approach of tackling a larger design project while reducing concerns about breadboard implementation.

Overall, teaching staff reported a noticeable decrease in time spent debugging students’ circuits during semester, while observations of the final project demonstrations indicated that more students met or exceeded the project’s minimum objectives than the previous year. Discussions with groups during the project assessment highlighted the ease at which students within the group could all identify the various sub-systems comprising the project, in stark contrast to the year before. 

AU  - Brian Scott Krongold
AU  - Gavin Buskes
CY  - Portland, Oregon
DA  - 2024/06/23
PB  - ASEE Conferences
TI  - GIFTS: Templating Circuit Sub-Systems to Improve Outcomes in a First-Year Circuit Design Project
UR  - https://peer.asee.org/47505
ER  -