San Antonio, Texas
June 10, 2012
June 10, 2012
June 13, 2012
25.9.1 - 25.9.9
Professional Development Opportunity for Electrical Engineering Technology Educators in VHDL and FPGA designAbstractHardware Description Language and Field Programmable Gate Array (FPGA) haverevolutionized the way Digital Logic Design is taught and implemented. Traditional ways ofteaching logic design using discrete components (TTL: Transistor-Transistor Logic and CMOS:Complementary Metal Oxide Semiconductors) have been replaced by Programmable LogicDevices (CPLD: Complex Programmable Logic Devices and FPGA). Today, a more standarddevelopment process is widely used in industry. The process uses Hardware DescriptionLanguages as a design entry to describe the digital systems. The two most widely used HardwareDescription Languages in industry are VHDL (Very High Speed Integrated Circuit HardwareDescription Language) and Verilog (Verifying Logic). Although most traditional electrical andcomputer engineering programs have updated their curriculum to include topics in hardwaredescription language and programmable logic design (FPGA/CPLD), two-year and four-yearelectrical engineering technology programs have fallen behind and are moving slowly inupdating their curriculum. This paper will discuss the offering of two-day VHDL and FPGAdesign workshop for electrical engineering technology faculty as part of National ScienceFoundation- Advanced Technological Education grant. The goal of this workshop is to combinetechnical information from the vendor training with practical curriculum planning and strategiesfor developing courses like those developed at The University under this project. Theparticipating faculty members learned introductory material on the impact of teachingengineering technology students relevant skills in hardware modeling and FPGA design. Insubsequent sessions, the faculty members learned fundamental concepts of VHDL and gainknowledge on FPGA design environment using Altera Quatrus development software.Participants gained hands-on lab experience in modeling basic building blocks of digital systemsand learn the FPGA design flow sfrom HDL design entry and circuit simulation to verifying thecorrectness of the design. Participating faculty members toured the Re-configurable ComputingLab and learned the hardware and software necessary to establish a re-configurable lab at theirrespective institutions. The University faculty members will assist participating faculty membersin further development of curriculum through a post-workshop follow-up. Curriculum materialdeveloped at The University is made available for use by participating faculty members bothduring and after the workshop.
Alaraje, N., & Sergeyev, A. (2012, June), Professional Development Opportunity for Electrical Engineering Technology Educators in VHDL and FPGA Design Paper presented at 2012 ASEE Annual Conference & Exposition, San Antonio, Texas. https://peer.asee.org/20765
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