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Professional Development Opportunity for Electrical Engineering Technology Educators in VHDL and FPGA Design

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Collection

2012 ASEE Annual Conference & Exposition

Location

San Antonio, Texas

Publication Date

June 10, 2012

Start Date

June 10, 2012

End Date

June 13, 2012

ISSN

2153-5965

Conference Session

Capstone Projects and Experiential Learning

Tagged Division

Engineering Technology

Page Count

9

Page Numbers

25.9.1 - 25.9.9

Permanent URL

https://peer.asee.org/20765

Download Count

31

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Paper Authors

biography

Nasser Alaraje Michigan Technological University

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Nasser Alaraje is currently the Electrical Engineering Technology program Chair, as well as a faculty member at Michigan Technological University. He taught and developed courses in the computer engineering technology area at the University of Cincinnati and Michigan Technological University. Alaraje’s research interests focuses on processor architecture, system-on-chip design methodology, field-programmable logic array (FPGA) architecture and design methodology, engineering technology education, and hardware description language modeling. Alaraje is a Fulbright scholar; he is a member of the American Society for Engineering Education (ASEE), a member of the ASEE Electrical and Computer Engineering Division, a member of the ASEE Engineering Technology Division, a member of the Institute of Electrical & Electronic Engineers (IEEE), and a member of the Electrical and Computer Engineering Technology Department Heads Association (ECETDHA).

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Aleksandr Sergeyev Michigan Technological University

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Aleksandr Sergeyev is currently an Assistant Professor in the Electrical Engineering Technology program in the School of Technology at Michigan Technological University. Sergeyev is earned his bachelor's degree in electrical engineering in Moscow University of Electronics and Automation in 1995. He obtained the master's degree in physics from Michigan Technological University in 2004 and the Ph.D. degree in electrical engineering from Michigan Technological University in 2007. Sergeyev's research interests include high energy lasers propagation through the turbulent atmosphere, developing advanced control algorithms for wavefront sensing and mitigating effects of the turbulent atmosphere, digital inline holography, digital signal processing, and laser spectroscopy. He is also involved in developing new eye-tracking experimental techniques for extracting 3-D shape of the object from the movement of human eyes. Sergeyev is a member of American Society for Engineering Education (ASEE) and is actively involved in promoting engineering education.

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Abstract

Professional Development Opportunity for Electrical Engineering Technology Educators in VHDL and FPGA designAbstractHardware Description Language and Field Programmable Gate Array (FPGA) haverevolutionized the way Digital Logic Design is taught and implemented. Traditional ways ofteaching logic design using discrete components (TTL: Transistor-Transistor Logic and CMOS:Complementary Metal Oxide Semiconductors) have been replaced by Programmable LogicDevices (CPLD: Complex Programmable Logic Devices and FPGA). Today, a more standarddevelopment process is widely used in industry. The process uses Hardware DescriptionLanguages as a design entry to describe the digital systems. The two most widely used HardwareDescription Languages in industry are VHDL (Very High Speed Integrated Circuit HardwareDescription Language) and Verilog (Verifying Logic). Although most traditional electrical andcomputer engineering programs have updated their curriculum to include topics in hardwaredescription language and programmable logic design (FPGA/CPLD), two-year and four-yearelectrical engineering technology programs have fallen behind and are moving slowly inupdating their curriculum. This paper will discuss the offering of two-day VHDL and FPGAdesign workshop for electrical engineering technology faculty as part of National ScienceFoundation- Advanced Technological Education grant. The goal of this workshop is to combinetechnical information from the vendor training with practical curriculum planning and strategiesfor developing courses like those developed at The University under this project. Theparticipating faculty members learned introductory material on the impact of teachingengineering technology students relevant skills in hardware modeling and FPGA design. Insubsequent sessions, the faculty members learned fundamental concepts of VHDL and gainknowledge on FPGA design environment using Altera Quatrus development software.Participants gained hands-on lab experience in modeling basic building blocks of digital systemsand learn the FPGA design flow sfrom HDL design entry and circuit simulation to verifying thecorrectness of the design. Participating faculty members toured the Re-configurable ComputingLab and learned the hardware and software necessary to establish a re-configurable lab at theirrespective institutions. The University faculty members will assist participating faculty membersin further development of curriculum through a post-workshop follow-up. Curriculum materialdeveloped at The University is made available for use by participating faculty members bothduring and after the workshop.

ASEE holds the copyright on this document. It may be read by the public free of charge. Authors may archive their work on personal websites or in institutional repositories with the following citation: © 2012 American Society for Engineering Education. Other scholars may excerpt or quote from these materials with the same citation. When excerpting or quoting from Conference Proceedings, authors should, in addition to noting the ASEE copyright, list all the original authors and their institutions and name the host city of the conference. - Last updated April 1, 2015