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REALIZATION OF LOW POWER AND EFFICIENT SEQUENTIAL CIRCUITS USING REVERSIBLE LOGIC GATES

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Conference

2025 Northeast Section Conference

Location

University of Bridgeport, Bridgeport, CT

Publication Date

March 23, 2025

Start Date

March 22, 2025

End Date

March 22, 2025

Page Count

9

DOI

10.18260/1-2-1115-54948

Permanent URL

https://peer.asee.org/54948

Download Count

109

Paper Authors

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SUPARSHYA BABU SUKHAVASI

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Thanu Sri Gandham

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Susrutha Babu Sukhavasi

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Meruva Veera Venkata Bhargav

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SUKHAVASI, S. B., & Gandham, T. S., & Sukhavasi, S. B., & Bhargav, M. V. V. (2025, March), REALIZATION OF LOW POWER AND EFFICIENT SEQUENTIAL CIRCUITS USING REVERSIBLE LOGIC GATES Paper presented at 2025 Northeast Section Conference, University of Bridgeport, Bridgeport, CT. 10.18260/1-2-1115-54948

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