Radhakrishnan, C., & Chen, Y. (2022, August), Teaching Electronic Circuits with a Balance of Rigor,  Intuition, Approximation, and Inspection Analysis  Paper presented at 2022 ASEE Annual Conference & Exposition, Minneapolis, MN. 10.18260/1-2--40824

\bibitem{asee_peer_40824}
  Radhakrishnan, C., \& Chen, Y. (2022, August), \emph{Teaching Electronic Circuits with a Balance of Rigor,  Intuition, Approximation, and Inspection Analysis}
  Paper presented at 2022 ASEE Annual Conference \& Exposition, Minneapolis, MN.
  10.18260/1-2--40824

Chandrasekhar Radhakrishnan and Yuting Chen.  "Teaching Electronic Circuits with a Balance of Rigor,  Intuition, Approximation, and Inspection Analysis".  2022 ASEE Annual Conference & Exposition, Minneapolis, MN, 2022, August.  ASEE Conferences, 2022.  https://peer.asee.org/40824 Internet.  02 May, 2024

\bibitem{asee_peer_40824}
  Chandrasekhar Radhakrishnan and Yuting Chen.
  "Teaching Electronic Circuits with a Balance of Rigor,  Intuition, Approximation, and Inspection Analysis".
  \emph{2022 ASEE Annual Conference \& Exposition, Minneapolis, MN, 2022, August}.
  ASEE Conferences, 2022.
  https://peer.asee.org/40824 Internet.  02 May, 2024

@INPROCEEDINGS{asee_peer_40824
author = "Chandrasekhar Radhakrishnan and Yuting Chen"
title = "Teaching Electronic Circuits with a Balance of Rigor,  Intuition, Approximation, and Inspection Analysis"
booktitle = "2022 ASEE Annual Conference \& Exposition"
year = "2022"
month = "August"
address = "Minneapolis, MN"
publisher = "ASEE Conferences"
note = {https://peer.asee.org/40824}
number = {10.18260/1-2--40824}
}

TY  - CPAPER
AB  - Analog and mixed signal IC design is an important area in ECE and courses on this topic are usually offered to senior level students. A successful career in analog IC design requires a strong grasp of semiconductor device fundamentals and understanding the implications of device non-idealities. In addition, it’s necessary to develop intuition and make judicious approximations that can help one predict the larger impact of circuit level parameters. Meeting these learning objectives within a course can be challenging. A higher stress on analytical study of devices can negatively impact intuition needed to make the right approximations in analyzing circuits with many transistors. At the same time, adequate knowledge of fundamentals is needed to ensure that analysis has indeed yielded a solution that is correct. 
In this paper, we present the changes introduced in an elective junior level microelectronic circuits course including instructional methodology, course materials, and assessments. The purpose behind the changes was to provide students the experience of applying intuition and approximations in circuit analysis. Earlier offerings of the course stressed on an analytical approach to circuit analysis on circuits containing one transistor and only a fraction of time dedicated to circuits with two transistors in a traditional lecture format.  The changes in instructional methodology include introducing students to limitations of incremental analysis for complex circuits and the use of incremental analysis in overcoming these limitations. A combination of repetition and alternate application of incremental and inspection analysis is employed to help students appreciate the merits and limitations of each approach. In-class active learning techniques are used to illustrate implications of device non-idealities. The change in curriculum also necessitated the creation of new homework assignments and exams. 
This paper will present the changes in curriculum, illustration of teaching methodology using example topics, discussion on student assessment, and student perception of the course. It will be shown the material covered is more advanced in nature and at the same time student perception of the course has remained consistent.
AU  - Chandrasekhar Radhakrishnan
AU  - Yuting Chen
CY  - Minneapolis, MN
DA  - 2022/08/23
PB  - ASEE Conferences
TI  - Teaching Electronic Circuits with a Balance of Rigor,  Intuition, Approximation, and Inspection Analysis
UR  - https://peer.asee.org/40824
DO  - 10.18260/1-2--40824
ER  -