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Teaching Field Programmable Gate Array Design (Fpga) To Future Electrical Engineering Technologists: Course Development

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Conference

2007 Annual Conference & Exposition

Location

Honolulu, Hawaii

Publication Date

June 24, 2007

Start Date

June 24, 2007

End Date

June 27, 2007

ISSN

2153-5965

Conference Session

Electrical Engineering Technology Curriculum

Tagged Division

Engineering Technology

Page Count

6

Page Numbers

12.1357.1 - 12.1357.6

Permanent URL

https://peer.asee.org/2161

Download Count

222

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Paper Authors

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Nasser Alaraje Michigan Technological University

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Joanne DeGroat Ohio State University

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Aurenice Oliveira

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Abstract
NOTE: The first page of text has been automatically extracted and included below in lieu of an abstract

Teaching Field Programmable Gate Array Design (FPGA) to Future Electrical Engineering Technologists: Course Development

Abstract

FPGA-based re-programmable logic design became more attractive during the last decade, and the use of FPGA in digital logic design is increasing rapidly. The need for highly qualified FPGA designers is increasing at a fast rate. To respond to the industry needs of FPGA designers, universities are updating their curriculum with courses in FPGA logic design. As a result, the School of Technology at Michigan Technological University is stepping up to this challenge by introducing the FPGA design course.

The new course will be the third in series of digital logic design, it introduces the students to techniques needed for the design of very-large scale digital systems, including computers basic building block. The paper discusses the goals of this course and relates the goals to industry needs of highly trained FPGA designers.

1 Introduction

The applications utilizing FPGA (Field Programmable Gate Array) as a design medium are predominant [1]. FPGAs have been used extensively not only in logic emulation but also in custom-computing machines. The re-programmability nature of SRAM-FPGA makes it the workhorse of many new reprogrammable applications. One such example is in multi-mode hardware applications [4] where an FPGA with a set of different configuration files stored in a ROM can be used to support different functionalities. Also, multiple-FPGA systems are used extensively in logic emulation.

SRAM-FPGA’s are the most popular and becoming the workhorse of many re-programmable applications. SRAM - FPGAs’ re-programmability feature makes it more attractive since it can be completely changed by the same electrical process. A microprocessor can be configured to run different applications, the configuration of SRAM-FPGA can be changed for bug fixes or even upgrades, this makes them an ideal prototyping medium. FPGAs have evolved from only a glue logic device to platform-based design medium. According to ITRS, we are approaching a four billion transistors chip by the end of this decade, this will allow building a very complex, high performance systems on FPGA.

As the technology scaling continues, more and more logic will be available on chip, this creates a great avenue for System-on-FPGA (SoFPGA) that provides the platform for ( Intellectual Property) IP Cores re-use. IP Core can be either a hardcore or softcore. For example, Xilinx Virtex-II Pro is incorporated with IBM PowerPC hardcore RISC processors [9]. On the other hand, soft IP Core represents a more flexible synthesizable core that can be used on as needed basis.

Alaraje, N., & DeGroat, J., & Oliveira, A. (2007, June), Teaching Field Programmable Gate Array Design (Fpga) To Future Electrical Engineering Technologists: Course Development Paper presented at 2007 Annual Conference & Exposition, Honolulu, Hawaii. https://peer.asee.org/2161

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