Williams, J., & Mohammed, J. (2022, August), Work-in-Progress: Right out of the Gate: Supporting Applied Technology and Engineering Students in Inroductory Digital Logic Courses Using Logisim-Evolution and Basys 3  Paper presented at 2022 ASEE Annual Conference & Exposition, Minneapolis, MN. 10.18260/1-2--41171

\bibitem{asee_peer_41171}
  Williams, J., \& Mohammed, J. (2022, August), \emph{Work-in-Progress: Right out of the Gate: Supporting Applied Technology and Engineering Students in Inroductory Digital Logic Courses Using Logisim-Evolution and Basys 3}
  Paper presented at 2022 ASEE Annual Conference \& Exposition, Minneapolis, MN.
  10.18260/1-2--41171

Jeritt Williams and Jaby Mohammed.  "Work-in-Progress: Right out of the Gate: Supporting Applied Technology and Engineering Students in Inroductory Digital Logic Courses Using Logisim-Evolution and Basys 3".  2022 ASEE Annual Conference & Exposition, Minneapolis, MN, 2022, August.  ASEE Conferences, 2022.  https://peer.asee.org/41171 Internet.  01 May, 2024

\bibitem{asee_peer_41171}
  Jeritt Williams and Jaby Mohammed.
  "Work-in-Progress: Right out of the Gate: Supporting Applied Technology and Engineering Students in Inroductory Digital Logic Courses Using Logisim-Evolution and Basys 3".
  \emph{2022 ASEE Annual Conference \& Exposition, Minneapolis, MN, 2022, August}.
  ASEE Conferences, 2022.
  https://peer.asee.org/41171 Internet.  01 May, 2024

@INPROCEEDINGS{asee_peer_41171
author = "Jeritt Williams and Jaby Mohammed"
title = "Work-in-Progress: Right out of the Gate: Supporting Applied Technology and Engineering Students in Inroductory Digital Logic Courses Using Logisim-Evolution and Basys 3"
booktitle = "2022 ASEE Annual Conference \& Exposition"
year = "2022"
month = "August"
address = "Minneapolis, MN"
publisher = "ASEE Conferences"
note = {https://peer.asee.org/41171}
number = {10.18260/1-2--41171}
}

TY  - CPAPER
AB  - Ubiquitous, affordable, accessible: Choose 2. This is often the reality when selecting and using tools and hardware designed for beginners and/or non-engineers who are developing logic-based Hardware Description Language (HDL) to be implemented in Field Programmable Gate Array (FPGA) development. In this paper, the authors will discuss how Logisim-Evolution, a free, open-source graphics-based logic design and simulation software can be integrated with the Basys 3 FPGA board to provide applied engineering and technology students with a low-cost, high-application potential using familiar graphics-based logic schematic design without the need for direct HDL text-based coding. This is a qualitative work-in-progress paper that provides a educational practitioners with a proposed developmental approach to redesigning an introductory Digital Electronics (DE) course to accommodate students from diverse majors and educational backgrounds based on lessons learned in the moment. Examples are provided of how to engage students in immediate opportunities for hands-on learning to support common lessons found in an introductory DE course. Discussion is provided on the rationale and results of revising a DE course. Initial observations indicate that student engagement increased in the subject matter and they could begin to make connections with their future career goals. Plans for future study are presented.

Keywords: Logisim-Evolution, Basys 3, introductory digital logic, digital electronics
AU  - Jeritt Williams
AU  - Jaby Mohammed
CY  - Minneapolis, MN
DA  - 2022/08/23
PB  - ASEE Conferences
TI  - Work-in-Progress: Right out of the Gate: Supporting Applied Technology and Engineering Students in Inroductory Digital Logic Courses Using Logisim-Evolution and Basys 3
UR  - https://peer.asee.org/41171
DO  - 10.18260/1-2--41171
ER  -