ASEE PEER - A Semiconductor Knowledge and Literacy Test for High School and Community College Teachers
Asee peer logo

A Semiconductor Knowledge and Literacy Test for High School and Community College Teachers

Download Paper |

Conference

2024 ASEE Annual Conference & Exposition

Location

Portland, Oregon

Publication Date

June 23, 2024

Start Date

June 23, 2024

End Date

July 12, 2024

Conference Session

Innovative Strategies for Enhancing Engineering Education Across Diverse Learning Environments

Tagged Division

Electrical and Computer Engineering Division (ECE)

Tagged Topic

Diversity

Permanent URL

https://peer.asee.org/46491

Request a correction

Paper Authors

biography

Haniye Mehraban Oklahoma State University

visit author page

Haniye Mehraban obtained her Master of Science degree in Electrical Engineering from K.N. Toosi University of Technology, Tehran, Iran, in 2017. Currently, she is a Ph.D. student in Electrical Engineering at Oklahoma State University, Stillwater, OK, USA. Her research interests are primarily focused on Analog Integrated Circuit Design.

visit author page

biography

Jennifer Dawn Cribbs Oklahoma State University

visit author page

Jennifer Cribbs, is a Professor in the School of Teaching, Learning and Educational Sciences at Oklahoma State University. She is also the Director for the Center for Research on STEM Teaching and Learning (CRSTL). Dr. Cribbs earned a B.S. in Chemical Engineering at Florida Institute of Technology, a MAT in Mathematics Education at Converse College, and a Ph.D. in Curriculum and Instruction with a focus on Mathematics Education at Clemson University. Her research focus is on mathematics identity and student persistence in STEM. She also explores teachers’ beliefs and practices and their connection to student affect.

visit author page

biography

John Hu Oklahoma State University Orcid 16x16 orcid.org/0000-0002-6174-8392

visit author page

John Hu received his B.S. in Electronics and Information Engineering from Beihang University, Beijing, China, in 2006 and his M.S. and Ph.D. in electrical and computer engineering from the Ohio State University, Columbus, OH, in 2007 and 2010, respectively. He worked as an analog IC designer at Texas Instruments, Dallas, between 2011 and 2012. He was a Member of Technical Staff, IC Design at Maxim Integrated, San Diego, CA, between 2012 and 2016, and a Staff Engineer at Qualcomm, Tempe, AZ, between 2016 and 2019. In 2019, he joined the School of Electrical and Computer Engineering at Oklahoma State University, where he is currently an assistant professor and Jack H. Graham Endowed Fellow of Engineering. His research interests include power management IC design, hardware security, and energy-efficient computing.

visit author page

Download Paper |

Abstract

This paper describes the construction, validation, and testing of a custom evaluation instrument to gauge high school and community college teachers’ semiconductor knowledge and literacy before and after participation in a chip design Research Experience for Teachers (RET) program. The RET site is the first in the US to focus on chip design and K-14 semiconductor education. One of the goals of the RET program is to increase teachers’ semiconductor knowledge and literacy on contemporary issues related to the Chips Act.

However, how do we measure this? Unlike other aspects of teachers’ performance, such as the level of agreement with Design, Engineering, and Technology (DET), there is no existing survey or questionnaire that can capture an average adult’s semiconductor content knowledge. A Physics of Semiconductor Concept Inventory (PCSI) aimed at assessing undergraduate students’ content knowledge on the physics of semiconductors and the ability to interpret content was proposed by Ene and Ackerson (2018). However, the PCSI instrument focused exclusively on semiconductor physics and not enough on chip design or semiconductor literacy regarding the economic and societal issues surrounding the recent Chips and Science Act (2022).

This paper proposes a Semiconductor Knowledge and Literacy Test (SKLT) designed for teacher education. The fifteen-question test was conceived by the RET faculty specialized in analog and digital IC design research. The technical questions cover semiconductor materials, design, manufacturing, and measurements. Non-technical questions include semiconductor literacy quizzes on major US semiconductor companies, economics, and federal policy. In addition to multiple choice questions, the survey features show answers, where the instructor can further gauge the respondent’s semiconductor knowledge.

The proposed SKLT tests and their proper interpretation were reviewed by multiple practicing engineers in the semiconductor industry to validate the instrument. Pre- and post-RET survey data using this instrument on the first cohort of the RET training site will also be shared.

The complete questionnaire will be posted on GitHub for everyone to use for free. Public feedback from academic, industry, and other sources is sought to refine the instruments further.

Mehraban, H., & Cribbs, J. D., & Hu, J. (2024, June), A Semiconductor Knowledge and Literacy Test for High School and Community College Teachers Paper presented at 2024 ASEE Annual Conference & Exposition, Portland, Oregon. https://peer.asee.org/46491

ASEE holds the copyright on this document. It may be read by the public free of charge. Authors may archive their work on personal websites or in institutional repositories with the following citation: © 2024 American Society for Engineering Education. Other scholars may excerpt or quote from these materials with the same citation. When excerpting or quoting from Conference Proceedings, authors should, in addition to noting the ASEE copyright, list all the original authors and their institutions and name the host city of the conference. - Last updated April 1, 2015